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Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM 2017-01-30
14:00		 Tokyo Kikai-Shinko-Kaikan Bldg. (Tokyo) [Invited Talk] Novel Voltage Controlled MRAM (VCM) with Fast Read/Write Circuits for Ultra Large Level Cache
Yoichi Shiota (AIST), Hiroki Noguchi, Kazutaka Ikegami, Keiko Abe, Shinobu Fujita (Toshiba), Takayuki Nozaki, Shinji Yuasa (AIST), Yoshishige Suzuki (Osaka Univ.) SDM2016-135		 In future processing system, the memory capacity of last level cache (LLC) must be increased, because LLC needs to cover... [more] SDM2016-135
pp.21-24
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