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Special Interest Group on System and LSI Design Methodology (IPSJ-SLDM) (Searched in: 2011)
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Search Results: Keywords 'from:2011-05-18 to:2011-05-18'
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[Go to Official IPSJ-SLDM Homepage (Japanese)] |
Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Ascending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
IPSJ-SLDM, VLD |
2011-05-18 14:15 |
Fukuoka |
Kitakyushu International Conference Center |
Study of the slew-rate contorol system for reducing far-end crosstalk Kazunori Nakashima, Suguru Kato, Shinichi Sasaki (Saga Univ) VLD2011-1 |
(To be available after the conference date) [more] |
VLD2011-1 pp.1-6 |
IPSJ-SLDM, VLD |
2011-05-18 14:40 |
Fukuoka |
Kitakyushu International Conference Center |
An Effective Overlap Removable Objective for Analytical Placement Syota Kuwabara, Yukihide Kohira (Univ. of Aizu), Yasuhiro Takashima (Univ. of Kitakyushu) VLD2011-2 |
In the recent LSI design, it is difficult to obtain the placement which satisfies design constraints and specifications ... [more] |
VLD2011-2 pp.7-12 |
IPSJ-SLDM, VLD |
2011-05-18 15:05 |
Fukuoka |
Kitakyushu International Conference Center |
Path Encoding Method for High Speed Frequency-Mapping Associative Memory Seiryu Sasaki, Masahiro Yasuda, Akio Kawabata, Tetsushi Koide, Hans Juergen Mattausch (Hiroshima Univ.) VLD2011-3 |
[more] |
VLD2011-3 pp.13-18 |
IPSJ-SLDM, VLD |
2011-05-18 15:45 |
Fukuoka |
Kitakyushu International Conference Center |
[Invited Talk]
Recent Gating-Techniques for Power Reduction Kimiyoshi Usami (Shibaura Inst. of Tech.) VLD2011-4 |
Key techniques to reduce power dissipation of LSIs are clock gating and power gating. In this talk, I will describe basi... [more] |
VLD2011-4 pp.19-24 |
IPSJ-SLDM, VLD |
2011-05-18 16:50 |
Fukuoka |
Kitakyushu International Conference Center |
[Invited Talk]
Low Power Design Technology on Algorithm/Architecture Level for Video Processing Satoshi Goto (Waseda Univ.) VLD2011-5 |
[more] |
VLD2011-5 pp.25-26 |
IPSJ-SLDM, VLD |
2011-05-19 09:30 |
Fukuoka |
Kitakyushu International Conference Center |
Super-resolution by UsingWeighted Adders with Selector Logics Hiromine Yoshihara, Masao Yanagisawa, Tatsuo Ohtsuki, Nozomu Togawa (Waseda Univ.) VLD2011-6 |
[more] |
VLD2011-6 pp.27-32 |
IPSJ-SLDM, VLD |
2011-05-19 09:55 |
Fukuoka |
Kitakyushu International Conference Center |
Multi-Stage Power Gating Based on Controlling Values of Logic Gates Jin Yu, Shinji Kimura (Waseda Univ.) VLD2011-7 |
Controlling value based power gating is a fine-grained power gating approach using the controlling values of logic eleme... [more] |
VLD2011-7 pp.33-38 |
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