|
|
All Technical Committee Conferences (Searched in: All Years)
|
|
Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
|
Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
RECONF, CPSY, VLD, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2006-11-30 15:50 |
Fukuoka |
Kitakyushu International Conference Center |
Delay optimized technology mapping for Variable Grain Logic Cell Hideaki Nakayama, Ryoichi Yamaguchi, Motoki Amagasaki, Kazunori Matsuyama, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) |
[more] |
RECONF2006-55 pp.67-72 |
RECONF |
2006-05-18 11:00 |
Miyagi |
TOHOKU UNIVERSITY |
A Study of Mapping Method for Variable Grain Logic Cell Architecture Ryoichi Yamaguchi, Kazunori Matsuyama, Hideaki Nakayama, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) |
[more] |
RECONF2006-1 pp.1-6 |
RECONF |
2005-11-30 14:40 |
Fukuoka |
Kitakyushu International Conference Center |
Variable Grain Logic Cell Architecture for Reconfigurable Device Motoki Amagasaki, Hideaki Nakayama, Naoto Hamabe, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) |
Reconfigurable logic devices are classified into the fine-grained approach and the coarse-grained approach
by the granu... [more] |
RECONF2005-53 pp.1-6 |
RECONF |
2005-11-30 15:05 |
Fukuoka |
Kitakyushu International Conference Center |
Implementation of Basic Function Blocks for Variable Grain Logic Cell Naoto Hamabe, Hideaki Nakayama, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) |
We can devide commercially avairable reconfigurable logic devices into two categories by processing data size, one is a ... [more] |
RECONF2005-54 pp.7-12 |
|
|
|
[Return to Top Page]
[Return to IEICE Web Page]
|