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Committee Date Time Place Paper Title / Authors Abstract Paper #
RECONF 2007-05-17
16:50		 Ishikawa Kanazawa Bunka Hall Detailed Evaluation of Delay for the Small-World Network Routing Structure
Yuzo Nishioka (Kumamoto Univ.), Hisashi Tsukiashi (Renesas Technology), Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2007-8		 The logic density of FPGA has improved rapidly. In deep sub-micron process, the wire delay increases because of the augm... [more] RECONF2007-8
pp.43-48
RECONF 2005-05-12
16:45		 Kyoto Kyoto University Reducing the Delay by Using the Small-World Network Structure
Hisashi Tsukiashi, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) 		The logic density of FPGA has imploved rapidly. However, as for deep sub-micron processes, the wire delay accounts for a... [more] RECONF2005-12
pp.67-72
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