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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2009-12-02
16:00		 Kochi Kochi City Culture-Plaza Simulation-Based Bus Width Optimization for Two-Level Cache
Shinta Watanabe, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.) VLD2009-48 DC2009-35		 In this paper, we propose a simulation-based bus width and cache configuration optimization approach for two-level cache... [more] VLD2009-48 DC2009-35
pp.43-48
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