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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD 2014-03-03
16:25		 Okinawa Okinawa Seinen Kaikan Secure scan design using improved random order scans and its evaluations
Masaru Oya, Yuta Atobe, Youhua Shi, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.) VLD2013-141		 Scan test using scan chains is one of the most important DFT techniques.
On the other hand, scan-based attacks are repo... [more]		 VLD2013-141
pp.43-48
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2012-11-26
16:00		 Fukuoka Centennial Hall Kyushu University School of Medicine Secure Scan Architecture Using State Dependent Scan Flip Flop with Key-Based Configuration against Scan-Based Attack
Yuta Atobe, Youhua Shi, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.) VLD2012-67 DC2012-33		 Secure cryptographic LSIs is intensively used in order to perform confidential operation. Scan test has become the most ... [more] VLD2012-67 DC2012-33
pp.45-50
IE, SIP, ICD, VLD, IPSJ-SLDM [detail] 2012-10-19
16:00		 Iwate Hotel Ruiz Secure Scan Architecture Using State Dependent Scan Flip-Flop with Key-Based Configuration on RSA Circuit  
Yuta Atobe, Youhua Shi, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.) VLD2012-57 SIP2012-79 ICD2012-74 IE2012-81		 Scan test is one of the useful design for testability techniques, which can detect circuit failure efficiently. However,... [more] VLD2012-57 SIP2012-79 ICD2012-74 IE2012-81
pp.95-100
VLD, CAS, MSS, SIP 2012-07-03
11:40		 Kyoto Kyoto Research Park Secure Scan Architecture on RSA Circuit Using State Dependent Scan Flip Flop against Scan-Based Side Channel Attack
Yuta Atobe, Youhua Shi, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.) CAS2012-21 VLD2012-31 SIP2012-53 MSS2012-21		 Scan test that is one of the useful design for testability tecniques, which can control and observe the FFs(Flip Flops) ... [more] CAS2012-21 VLD2012-31 SIP2012-53 MSS2012-21
pp.115-120
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