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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD, ITE-IST | 2011-07-21 11:20 |
Hiroshima | Hiroshima Institute of Technology | 64ch Neural Recording Chip for Human Brain-Machine Interfaces Takeshi Yoshida, Katsuya Sueishi (Hiroshima Univ.), Masahiro Ono (A-R-Tec), Hiroshi Ando (Hiroshima Univ.), Yoshitaka Murasaka, Atsushi Iwata (A-R-Tec), Kojiro Matsushita, Masayuki Hirata (Osaka Univ.), Takafumi Suzuki (Univ. of Tokyo)  ICD2011-23 |
To improve the Quality of Life (QoL) of the severely disabled people, the brain-machine interface (BMI) and multi-channe... [more] | ICD2011-23 pp.25-30 |
| ICD, ITE-IST | 2009-10-01 09:35 |
Tokyo | CIC Tokyo (Tamachi) | A 6-bit Arbitrary Digital Noise Emulator in 65nm CMOS Technology Daisuke Fujimoto, Tetsuro Matsuno (Kobe Univ.), Daisuke Kosaka (A-R-Tec), Naoyuki Hamanishi, Ken Tanabe, Masazumi Shiochi (Toshiba Corp.), Makoto Nagata (Kobe Univ./A-R-Tec) ICD2009-34 |
An arbitrary noise generator (ANG) is based on time-series charging of divided parasitic capacitance (TSDPC) and emulat... [more] |
ICD2009-34 pp.7-10 |
| ICD, ITE-IST | 2009-10-02 11:00 |
Tokyo | CIC Tokyo (Tamachi) | [Invited Talk]
AD Conversion Principles and CMOS Circuit Techniques Atsushi Iwata (A-R-Tec) ICD2009-50 |
Many kinds of AD conversion schemes of Successive approximation, Flash, Pipelined, Delta Sigma, were proposed and integr... [more] | ICD2009-50 pp.93-98 |
| ICD, ITE-IST | 2007-07-26 09:45 |
Hyogo | On-Die Supply-Voltage Noise Sensor with Real-Time Sampling Mode for Low-Power Processor Applications Tomio Sato, Atsuki Inoue, Tetsuyoshi Shiota, Tomoko Inoue, Yukihito Kawabe, Tetsutaro Hashimoto (Fujitsu Lab.), Toshifumi Imamura, Yoshitaka Murasaka, Makoto Nagata, Atsushi Iwata (A-R-Tec) ICD2007-40 |
The real time on-die noise sensor reported here can continuously detect up to 100 noise events per a second without dist... [more] | ICD2007-40 pp.17-22 |
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| ICD, VLD | 2007-03-07 16:40 |
Okinawa | Mielparque Okinawa | Equivalent Circuit Modeling of Guard Ring Structures for Evaluation of Substrate Crosstalk Isolation Daisuke Kosaka, Makoto Nagata (Kobe Univ.), Yoshitaka Murasaka, Atsushi Iwata (A-R-Tec) |
A substrate-coupling equivalent circuit can be derived for an arbitrary guard ring test structure by way of F-matrix co... [more] |
VLD2006-115 ICD2006-206 pp.55-60 |
| ICD, SDM | 2005-08-18 13:25 |
Hokkaido | HAKODATE KOKUSAI HOTEL | Isolation Strategy against Substrate Coupling in CMOS Mixed-Signal/RF Circuits Daisuke Kosaka, Makoto Nagata (Kobe Univ.), Yoshitaka Murasaka, Atsushi Iwata (A-R-Tec Corp.) |
A deep n-well guard-ring, DNW-GR, provides effective isolation from substrate-coupled high frequency noises in combinati... [more] | SDM2005-136 ICD2005-75 pp.49-54 |
| ICD | 2005-05-27 16:40 |
Hyogo | Kobe Univ. | Substrate Integrity Beyond 1GHz Mitsuya Fukazawa, Makoto Nagata (Kobe Univ.), Naoyuki Hamanishi, Masazumi Shiochi, Tetsuya Iida (Toshiba Corp.), Junichiro Watanabe (Toshiba Information Systems(Japan) Corp.), Yoshitaka Murasaka, Atsushi Iwata (A-R-Tec Corp.) |
(Advance abstract in Japanese is available) [more] | ICD2005-39 pp.61-64 |
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