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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| HWS, VLD [detail] | 2021-03-04 14:15 |
Online | Online | Experiments of Data Authenticity Verification in Multi-Node IoT Systems Using Elliptic Curve Digital Signature Chips Yuya Takahashi, Takuya Matsumaru, Kazuki Monta (Kobe Univ.), Toshihiro Sato, Takaaki Okidono (ECSEC Lab), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.)  VLD2020-85 HWS2020-60 |
Practicality of IoT systems requires the efficiency and speed of crypto processing in edge nodes and remote servers. So ... [more] | VLD2020-85 HWS2020-60 pp.97-101 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2020-11-18 14:50 |
Online | Online | Evaluation of operating performance of ECDSA hardware module II Yuya Takahashi, Takuya Matsumaru, Kazuki Monta (Kobe Univ.), Toshihiro Sato, Takaaki Okidono (ECSEC Lab), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.) VLD2020-32 ICD2020-52 DC2020-52 RECONF2020-51 |
[more] | VLD2020-32 ICD2020-52 DC2020-52 RECONF2020-51 pp.118-121 |
| ICD, SDM, ITE-IST [detail] | 2020-08-06 13:50 |
Online | Online | Over-the-top Si Interposer Embedding Backside Buried Metal to Reduce Power Supply Impedance Takuji Miki, Makoto Nagata, Akihiro Tsukioka (Kobe Univ.), Noriyuki Miura (Osaka Univ.), Takaaki Okidono (ECSEC), Yuuki Araga, Naoya Watanabe, Haruo Shimamoto, Katsuya Kikuchi (AIST) SDM2020-5 ICD2020-5 |
A 2.5D structure with a Si interposer stacked on a CMOS chip is developed to reduce power supply impedance. A backside b... [more] | SDM2020-5 ICD2020-5 pp.19-24 |
| HWS | 2020-04-07 10:00 |
Online | Online | A mode for performance evaluation of Montgomery multiplication in RNS Shinichi Kawamura (ECSEC TRA) HWS2020-1 |
[more] | HWS2020-1 pp.1-6 |
| VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2019-11-15 10:05 |
Ehime | Ehime Prefecture Gender Equality Center | Evaluation of operating performance of ECDSA hardware module Yuya Takahashi, Monta kazuki (Kobe Univ.), Toshihiro Sato, Takaaki Okidono (ECSEC Lab), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.) ICD2019-35 IE2019-41 |
There are limits to how much IoT power and encryption speed can be improved at the software level. Therefore, it is nece... [more] | ICD2019-35 IE2019-41 pp.37-40 |
| HWS | 2019-04-12 13:30 |
Miyagi | Tohoku University | An Improved RNS Binary Extended Euclidean Algorithm and a Residue Decoding Algorithm Shinichi Kawamura (ECSEC TRA/Toshiba/AIST), Yuichi Komano, Hideo Shimizu (Toshiba) HWS2019-1 |
[more] | HWS2019-1 pp.1-6 |
| HWS, VLD | 2019-03-02 10:25 |
Okinawa | Okinawa Ken Seinen Kaikan | ASIC Chip Implementation and Evaluation of Elliptic Curve Digital Signature Algorithm Sosuke Sato, Hiroki Yoshida, Kazuki Monta (Kobe Univ.), Takaaki Okidono (ECSEC), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.) VLD2018-138 HWS2018-101 |
We have designed and fabricated application specific semiconductor integrated circuit (ASIC) chips that embody the gener... [more] | VLD2018-138 HWS2018-101 pp.267-269 |
| ASN | 2019-01-29 13:25 |
Kagoshima | Kyuukamura Ibusuki | Improvement of Downlink Reliability in RPL and Performance Evaluation Ryoma Matsubara (OIT), Jean-Dominique Decotignie (CSEM), Kazuyoshi Oshima (OIT) ASN2018-92 |
(To be available after the conference date) [more] | ASN2018-92 pp.77-80 |
| ICD, CPSY, CAS | 2018-12-23 09:30 |
Okinawa | [Poster Presentation]
Evaluation of side-channel leakage in crypto modules with On-Chip-Monitor Kazuki Monta, Hiroki Sonoda, Akihiro Tsukioka (Kobe Univ.), Takaaki Okidono (ECSEC), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.) CAS2018-103 ICD2018-87 CPSY2018-69 |
[more] | CAS2018-103 ICD2018-87 CPSY2018-69 p.101 |
|
| HWS (2nd) |
2018-12-13 16:10 |
Tokyo | Tokyo Univ. Takeda Bldg. Takeda Hall | [Poster Presentation]
Computer experiments for efficient sign detection in RNS Yuya Kakei (ECSEC), Shinichi Kawamura (ECSEC/Toshiba) |
(Advance abstract in Japanese is available) [more] | |
| ASN (2nd) |
2018-11-29 14:50 |
Overseas | Hanoi University of Science and Technology | [Poster Presentation]
Improvement of downlink reliability by alleviating memory problem in RPL Ryoma Matsubara (OIT), Jean-Dominique Decotignie (CSEM), Kazuyoshi Oshima (OIT) |
(Advance abstract in Japanese is available) [more] | |
| HWS, ICD | 2018-10-29 13:25 |
Osaka | Kobe Univ. Umeda Intelligent Laboratory | Countermeasures for power noise and side-channel leakage in crypto fmodules (I) Kazuki Monta, Sousuke Sato, Akihiro Tsukioka (Kobe Univ.), Takaaki Okidono (ECSEC), Takuji Miki, Noriyuki Miura, Makoto Nagata (Kobe Univ.) HWS2018-48 ICD2018-40 |
[more] | HWS2018-48 ICD2018-40 pp.7-11 |
| EE | 2014-01-23 13:55 |
Miyazaki | MIYAZAKI KANKO HOTEL | Control Characteristics Improvement by Leakage Inductance in a Full-Bridge Converter with Snubber Capacitor Kazuhide Domoto, Yoichi Ishizuka (Nagasaki Univ.), Seiya Abe, Tamotsu Ninomiya (ICSEAD) EE2013-32 |
A high-voltage isolated dc-dc converter to be used in an HVDC power distribution systems has a big problem of high-volta... [more] | EE2013-32 pp.7-11 |
| EE | 2014-01-23 15:45 |
Miyazaki | MIYAZAKI KANKO HOTEL | A Characteristic of the Parallel Operation for LLC Current-Mode Resonant Converters in High-Voltage DC Power Distribution Systems Yosuke Mine, Yoichi Ishizuka, Kazuhide Domoto (Nagasaki Univ.), Seiya Abe, Tamotsu Ninomiya (ICSEAD) EE2013-36 |
Recently, power consumption of data center is increasing with the increasing of information and communication traffic. A... [more] | EE2013-36 pp.31-36 |
| EE | 2014-01-24 09:50 |
Miyazaki | MIYAZAKI KANKO HOTEL | A Matrix-POL Power Supply System with H-bridge Converter Ryota Shibahara, Kiminori Tanaka, Yoichi Ishizuka (Nagasaki Univ.), Seiya Abe, Tamotsu Ninomiya (ICSEAD) EE2013-41 |
[more] | EE2013-41 pp.61-66 |
| EE | 2014-01-24 10:25 |
Miyazaki | MIYAZAKI KANKO HOTEL | The Analysis of the PWM-Controlled Current-Mode Resonant DC-DC Converter Akinori Hariya (Nagasaki Univ.), Ken Matsuura, Hiroshige Yanagi, Satoshi Tomioka (TDK-Lambda), Yoichi Ishizuka (Nagasaki Univ.), Tamotsu Ninomiya (ICSEAD) EE2013-42 |
In this paper, a new pulse width modulation (PWM) control method for the isolated current-mode resonant converter with a... [more] | EE2013-42 pp.67-72 |
| EE, WPT, IEE-SPC (Joint) [detail] |
2013-07-26 13:10 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Improvement Technique for Control Characteristics of a High-Voltage Isolated DC-DC Converter with a Snubber Capacitor Kazuhide Domoto, Yoichi Ishizuka (Nagasaki Univ.), Tamotsu Ninomiya, Seiya Abe (ICSEAD), Rejeki Simanjorang, Hiroshi Yamaguchi (AIST), Masato Kaga (NTT-F) EE2013-13 |
A high-voltage isolated dc-dc converter to be used in an HVDC power distribution systems has a big problem of high-volta... [more] | EE2013-13 pp.61-66 |
| EE, CPM | 2013-01-24 11:15 |
Kumamoto | Dynamic Characteristics of LLC Current-Mode Resonant DC-DC Converter Shuhei Kawazu, Yosuke Mine, Yoichi Ishizuka, Tamotsu Ninomiya (Nagasaki Univ), Seiya Abe (ICSEAD) EE2012-31 CPM2012-153 |
Recent development of power electronics has derived a wide use of switched-mode power supply in most of electrical and e... [more] | EE2012-31 CPM2012-153 pp.17-22 |
|
| EE, CPM | 2013-01-24 17:50 |
Kumamoto | Improvement of Efficiency and Power Density of LLC Current-Mode resonant converters in High-Voltage DC Power Distribution Systems Satoshi Motomura (Nagasaki Univ.), Seiya Abe (ICSEAD), Daiki Kawahara, Kazuhide Domoto, Yoichi Ishizuka, Tamotsu Ninomiya (Nagasaki Univ.), Masahito Shoyama (Kyusyu Univ.), Masato Kaga (NTT-F) EE2012-43 CPM2012-165 |
[more] | EE2012-43 CPM2012-165 pp.87-91 |
|
| EE, CPM | 2013-01-25 10:15 |
Kumamoto | Development of scale down testbed for high voltage power device Takashi Matsuyoshi (KIT), Msanori Tsukuda (ICSEAD/KIT), Hidetoshi Hirai, Ichiro Omura (KIT) EE2012-46 CPM2012-168 |
The testbed for high voltage power device evaluation was developed. This testbed is constituted by special device packag... [more] | EE2012-46 CPM2012-168 pp.105-109 |
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