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Committee Date Time Place Paper Title / Authors Abstract Paper #
CPM, ICD 2008-01-18
Tokyo Kikai-Shinko-Kaikan Bldg A Method for Measuring Vref Noise Tolerance of DDR2-SDRAM on Test Board that Simulates Memory Module
Yutaka Uematsu, Hideki Osaka (Hitachi), Yoji Nishio, Susumu Hatano (Elpida) CPM2007-139 ICD2007-150
Aiming to achieve double data rate-synchronous DRAM (DDR-SDRAM) at low-cost and with high noise tolerance by setting ade... [more] CPM2007-139 ICD2007-150
ICD, SDM 2006-08-17
Hokkaido Hokkaido University 17GHz Fine Grid Clock Distribution with Uniform-Amplitude Standing-Wave Oscillator
Atsushi Mori, Mamoru Sasaki, Mitsuru Shiozaki, Atsushi Iwata (Hiroshima Univ.), Hiroaki Ikeda (Elpida)
 [more] SDM2006-139 ICD2006-93
ICD, SDM 2005-08-19
Hokkaido HAKODATE KOKUSAI HOTEL A 0.4-V High-Speed Long-Retention-Time DRAM Array with 12 F2 Twin Cell
Riichiro Takemura, Kiyoo Itoh, Tomonori Sekiguchi, Satoru Akiyama, Satoru Hanzawa (Hitachi), Kazuhiko Kajigaya (ELPIDA), Takayuki Kawahara (Hitachi)
We propose and evaluate a DRAM cell array with 12-F2 twin cell in terms of speed, retention time, and low-voltage operat... [more] SDM2005-152 ICD2005-91
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