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 Results 1 - 6 of 6  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
RCS, NS
(Joint)		 2018-12-21
09:50		 Hiroshima Onomichi City Hall Transmission performance for computer simulation and experiment in LoRaWAN CSS modulation scheme and its application of positioning service
Kyouka Abe (Grad. Sch. Suwa University of Science), Taisei Muramatsu, Keigo Nakajima, Miune Taguchi, Kazuhiro Yamaguchi, Hideaki Matsue (Suwa University of Science), Atsushi Iguchi (IDEA SYSTEM), Tasuku Hiroshima (Oi Electric) RCS2018-233		 Computer simulation and field experiment for LoRaWAN CSS modulation scheme are carried out. As a results, BER performa... [more] RCS2018-233
pp.83-87
RECONF 2017-09-25
15:25		 Tokyo DWANGO Co., Ltd. Proplsal of reconfigurable system LSI with BiCS technology -- Application to combination logic, FF, CMOS circuit and FPGA --
Shigeyoshi Watanabe (Shonan Inst. of Tech.), Tomohiro Yokota (DNP Data Techno), Shouto Tamai (Oi Electric), Takumi Sato (Japan Business Systems) RECONF2017-28		  [more] RECONF2017-28
pp.37-42
RECONF 2016-09-05
15:35		 Toyama Univ. of Toyama Proposal of vertical stacked reconfigurable Fe-FET NAND logic and its application to combination logic, flip-flop and LUT
Shigeyoshi Watanabe (Shonan Inst. of Tech.), Tomohiro Yokota (DNP Data Techno), Shoto Tamai (Oi Electric), Takumi Sato (Shonan Inst. of Tech.) RECONF2016-29		  [more] RECONF2016-29
pp.23-28
SDM 2014-10-17
15:20		 Miyagi Niche, Tohoku Univ. Design method of stacked type NAND MRAM
Shigeyoshi Watanabe (Shonan Inst. of Tech), Shoto Tamai (Oi Electric Co. LTD.) SDM2014-95		  [more] SDM2014-95
pp.69-74
SRW 2014-06-16
14:15		 Kanagawa Mitsubishi Electric The Field-Test Results of Frequency Spread Spectrum Wireless System on 920MHz Frequency Band
Kazuo Kimura, Masaki Fujiwara, Eiji Ogata, Hiroshi Masugi (Oi Electric) SRW2014-9		 In wireless systems using “ the specified low power radio ”, the amount of information to be transmitted may be small, t... [more] SRW2014-9
pp.47-51
SDM, ICD 2011-08-25
09:00		 Toyama Toyama kenminkaikan Study of pattern area reduction with 3 dimensional transistor for logic circuit
Takahiro Kodama, Shigeyoshi Watanabe (SIT), Yu Hiroshima (Oi Electric) SDM2011-71 ICD2011-39		  [more] SDM2011-71 ICD2011-39
pp.1-6
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