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Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD 2017-04-21
Tokyo   [Invited Lecture] A 6.05-Mb/mm2 16-nm FinFET Double Pumping 1W1R 2-port SRAM with 313ps Read Access Time
Yohei Sawada, Makoto Yabuuchi, Masao Morimoto (REL), Toshiaki Sano (RSD), Yuichiro Ishii, Shinji Tanaka (REL), Miki Tanaka (RSD), Koji Nii (REL) ICD2017-12
 [more] ICD2017-12
ICD 2016-04-14
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Lecture] A Cost Effective Test Screening Method on 40-nm 4-Mb Embedded SRAM for Low-power MCU
Yuta Yoshida (RSD), Yoshisato Yokoyama, Yuichiro Ishii (Renesas Electronics), Toshihiro Inada, Koji Tanaka, Miki Tanaka, Yoshiki Tsujihashi (RSD), Koji Nii (Renesas Electronics) ICD2016-1
An embedded single-port SRAM with cost effective test screening circuitry is demonstrated for low-power micr... [more] ICD2016-1
SDM, ICD 2015-08-24
Kumamoto Kumamoto City Development of a compacted doubly nesting array in Narrow Scribe Line aimed at detecting soft failures of interconnect via
Hiroki Shinkawata, Nobuo Tsuboi (REL), Atsushi Tsuda (RSD), Shingo Sato (Kansai), Yasuo Yamaguchi (REL) SDM2015-58 ICD2015-27
We introduce a new addressable test structure array using for mass production stage which is compacted doubly nesting ar... [more] SDM2015-58 ICD2015-27
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