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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
ICD |
2014-04-18 10:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
A 7ns-Access-Time 25μW/MHz 128kb SRAM for Low-Power Fast Wake-Up MCU in 65nm CMOS with 27fA/b Retention Current Toshikazu Fukuda, Koji Kohara, Toshiaki Dozaka, Yasuhisa Takeyama, Tsuyoshi Midorikawa (Toshiba), Kenji Hashimoto, Ichiro Wakiyama (TOSMEC), Shinji Miyano, Takehiko Hojo (Toshiba) ICD2014-12 |
Low leakage 128kb SRAM with 65 nm technology that consumes only 3.5nA (27fA/b) in the retention mode is fabricated. Oper... [more] |
ICD2014-12 pp.59-64 |
ICD |
2007-04-13 09:10 |
Oita |
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Floating Body RAM Technology and its Scalability to 32nm Node Hiroomi Nakajima, Naoki Kusunoki, Tomoaki Shino (Toshiba), Tomoki Higashi (TOSMEC), Takashi Ohsawa, Katsuyuki Fujita, Nobuyuki Ikumi, Fumiyoshi Matsuoka, Ryo Fukuda, Yohji Watanabe, Yoshihiro Minami (Toshiba), Atsushi Sakamoto (TJ), Jun Nishimura, Takeshi Hamamoto, Akihiro Nitayama (Toshiba) ICD2007-10 |
Technologies and improved performance of the Floating Body RAM are demonstrated. Reducing SOI thickness to 43nm, a 16Mb ... [more] |
ICD2007-10 pp.53-58 |
ICD |
2006-04-13 11:35 |
Oita |
Oita University |
Technology development of 128Mb-FBC(Floating Body Cell) Memory by 90nm node CMOS process Hiroomi Nakajima, Yoshihiro Minami, Tomoaki Shino (SoC Center, Toshiba), Atsushi Sakamoto (TJ), Tomoki Higashi (TOSMEC), Naoki Kusunoki, Katsuyuki Fujita, Kosuke Hatsuda, Takashi Ohsawa, Nobutoshi Aoki, Hiroyoshi Tanimoto, Mutsuo Morikado, Kazumi Inoh, Takeshi Hamamoto, Akihiro Nitayama (SoC Center, Toshiba) |
A 128Mb SOI DRAM with FBC (Floating Body Cell) has been successfully developed for the first time. In order to realize f... [more] |
ICD2006-5 pp.25-30 |
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