|
|
All Technical Committee Conferences (Searched in: All Years)
|
|
Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
|
Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] |
2016-01-20 14:40 |
Kanagawa |
Hiyoshi Campus, Keio University |
FPGA-based Tsunami Simulator developed by using stream-computing hardware compiler Kohei Nagasu, Kentaro Sano (Tohoku Univ.), Fumiya Kono, Naohito Nakasato (The Univ. of Aizu) VLD2015-92 CPSY2015-124 RECONF2015-74 |
Method of Splitting Tsunami (MOST) is a numerical solver of Shallow Water Equations (SWEs), which is used for forecastin... [more] |
VLD2015-92 CPSY2015-124 RECONF2015-74 pp.131-136 |
IE, ITS, ITE-AIT, ITE-HI, ITE-ME, ITE-MMS, ITE-CE [detail] |
2015-02-23 16:10 |
Hokkaido |
Hokkaido Univ. |
Quality-Delay Tradeoff Optimization in Multi-Bitrate Apdative Streaming Duc V. Nguyen (The Univ. of Aizu), Nguyen Dung, Pham Ngoc Nam (Hanoi Univ.of Sci.), Anh T. Pham, Truong Cong Thang (The Univ. of Aizu) |
[more] |
|
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-27 10:55 |
Fukuoka |
Centennial Hall Kyushu University School of Medicine |
A Behavioral Synthesis Method for Asynchronous Pipelined Circuits with Bundled-data Implementation Naohiro Hamada, Hiroshi Saito (The Univ. of Aizu) VLD2012-77 DC2012-43 |
In this paper, we propose behavioral synthesis methods for asynchronous pipelined circuits with bundled-data implementat... [more] |
VLD2012-77 DC2012-43 pp.105-110 |
VLD |
2010-03-11 15:00 |
Okinawa |
|
Fast Estimation Method of Peak Power considered Input Vector and Inner State of a Circuit Nobuyoshi Takahashi (Tokyo Inst. of Tech.), Yoichi Tomioka (Tokyo Univ. of Agriculture and Tech.), Yukihide Kohira (The Univ. of Aizu), Atsushi Takahashi (Osaka Univ.) VLD2009-115 |
The peak power of a clock synchronous circuit is requested to be small to reduce the influence on circuit performance an... [more] |
VLD2009-115 pp.97-102 |
VLD, IPSJ-SLDM |
2009-05-21 10:00 |
Fukuoka |
Kitakyushu International Conference Center |
A RST Construction Method for Vertices with Maximum Path Length Masafumi Inoue, Yoichi Tomioka (Tokyo Inst. of Tech.), Yukihide Kohira (the Univ. of Aizu), Atsushi Takahashi (Osaka Univ.) VLD2009-4 |
As the wire width decreases, the ratio of routing delay among signal propagation delay increases and the routing delay c... [more] |
VLD2009-4 pp.31-36 |
RECONF, CPSY, VLD, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2006-11-28 16:10 |
Fukuoka |
Kitakyushu International Conference Center |
Proposal of a Behavioral Synthesis Method for Asynchronous Circuits in Bundled-data Implementation Naohiro Hamada, Takao Konishi, Hiroshi Saito (The Univ. of Aizu), Tomohiro Yoneda (NII), Takashi Nanya (The Univ. of Tokyo) |
[more] |
VLD2006-63 DC2006-50 pp.71-76 |
RECONF, CPSY, VLD, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2006-11-30 15:50 |
Fukuoka |
Kitakyushu International Conference Center |
A Hardware Algorithm for the Minimum p-quasi Clique Cover Problem Shuichi Watanabe (The Grad. School, the Univ. of Aizu), Junji Kitamichi, Yuichi Okuyama, Kenichi Kuroda (The Univ. of Aizu) |
[more] |
VLD2006-84 DC2006-71 pp.73-78 |
COMP |
2005-06-24 13:45 |
Toyama |
|
The Relations among Watson-Crick Automata and Their Relations with Context-Free Languages Satoshi Okawa (The Univ. of Aizu), Sadaki Hirose (Toyama Univ.) |
Watson-Crick automata were introduced as a new computer model and have
been intensively investigated regarding their c... [more] |
COMP2005-22 pp.23-30 |
COMP |
2005-06-24 16:30 |
Toyama |
|
On Computational Power of Insertion-Deletion Systems without Using Contexts Sadaki Hirose (Toyama Univ.), Satoshi Okawa (The Univ. of Aizu) |
An Insertion-Deletion system, first introduced in [1], is a theoretical computing model in the DNA computing framework b... [more] |
COMP2005-27 pp.59-62 |
PRMU, MI |
2005-05-19 10:30 |
Aichi |
Nagoya Institute of Technology |
Property analysis of relation between image and text Keigo Hirai, Ryuichi Oka (The Univ. of Aizu) |
[more] |
PRMU2005-3 MI2005-3 pp.13-18 |
RECONF |
2005-05-13 16:45 |
Kyoto |
Kyoto University |
Implementation of Simplified Back Propagation Algorithm on a Dynamically Reconfigurable Device PCA-2 Tomoko Ootsuka, Keigo Kurata, Junji Kitamichi, Kenichi Kuroda (The Univ. of Aizu) |
[more] |
RECONF2005-27 pp.73-78 |
|
|
|
Copyright and reproduction :
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
|
[Return to Top Page]
[Return to IEICE Web Page]
|