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Committee Date Time Place Paper Title / Authors Abstract Paper #
CS, SIP, CAS 2008-03-07
13:00		 Yamaguchi Yamaguchi University [Poster Presentation] Code Optimization Method for Bypass Network Architechture by Evalation of DFG
Toshihiro Shoji, Jin Tian, Takefumi Miyoshi, Nobuhiko Sugino (Tokyo Tech．) CAS2007-139 SIP2007-214 CS2007-104		 For a bypass interconnected processor architecture, a heuristic code optimization method is proposed. In total power c... [more] CAS2007-139 SIP2007-214 CS2007-104
pp.75-78
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