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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 5 of 5  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
AP, RCS, WPT, SAT
(Joint)		 2015-11-06
14:00		 Okinawa Okinawa Prefectural Museum & Art Museum Short-Range Wireless Transmission Scheme Movable on a Flat Surface
Takuya Yamanaka (UEC), Akihiro Kodama (KAIYODENSHIKOGYO), Kazuyuki Takasaki (TMCIT), Yoshio Karasawa (UEC) WPT2015-62		 We have investigated short-range wireless transmission schemes without off-axial arrangement which comes significant red... [more] WPT2015-62
pp.85-90
AP, WPT
(Joint)		 2014-10-17
15:45		 Hokkaido Hokkaido University, Clark Memorial Student Center Proposal of Simultaneous Wireless Transmission of Power and Data with High Efficiency and Its Applications -- Development of Endless Rotaion Camera --
Akihiro Kodama (KAIYODENSHIKOGYO), Yoshio Karasawa (UEC) WPT2014-48		 Based on our previously proposed wireless power and data transmission scheme, namely, power transmission by means of mag... [more] WPT2014-48
pp.65-70
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2008-11-18
13:25		 Fukuoka Kitakyushu Science and Research Park An optimization method for MIMD controlled data communication of MX Core
Akihiro Kodama, Yuta Mizokami, Mitsutaka Nakano, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) CPSY2008-42		 The massively parallel SIMD (Single Instruction Multiple Data) processor MX Core, which has been developed by Renesas te... [more] CPSY2008-42
pp.31-36
CPSY 2008-10-31
14:30		 Hiroshima Hiroshima City Univ. Optimization method of data communication PEs for Massively Parallel SIMD processor
Sumio Hirota, Akihiro Kodama, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) CPSY2008-33		 The MX core is a massively parallel SIMD (Single Instruction Multiple Data) processor based on fine-grained 1,024 PEs (P... [more] CPSY2008-33
pp.23-28
RECONF 2008-05-22
15:15		 Fukushima The University of Aizu Path Planning Method for MIMD Controlled data communication in MX Core
Akihiro Kodama, Yuta Mizokami, Mitsutaka Nakano, Masahiro Iida, Toshinori Sueyoshi (kumamoto Univ.) RECONF2008-6		 The MX core is a massively parallel SIMD (Single Instruction Multiple Data) processor based on fine-grained 1,024 PEs (P... [more] RECONF2008-6
pp.31-36
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