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All Technical Committee Conferences (All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| RECONF | 2021-09-10 16:10 |
Online | Online | Multi-FPGA Based Hardware Acceleration for Genetic Data Analysis Imdad Ullah (Keio Univ.), Akram Ben Ahmed (AIST), Kazuei Hironaka, Kensuke Iizuka, Hideharu Amano (Keio Univ.)  RECONF2021-24 |
[more] | RECONF2021-24 pp.42-47 |
| CPSY, RECONF, VLD, IPSJ-ARC, IPSJ-SLDM [detail] | 2021-01-26 10:55 |
Online | Online | Network Intrusion Detection System based on Hybrid FPGA/GPU Pattern Matching Shunta Kikuchi (AIST/The Univ. of Tokyo), Tsutomu Ikegami, Akram ben Ahmed (AIST), Tomohiro Kudoh (The Univ. of Tokyo/AIST), Ryohei Kobayashi, Norihisa Fujita, Taisuke Boku (Univ. of Tsukuba) VLD2020-59 CPSY2020-42 RECONF2020-78 |
These days, Heterogeneous computing is becoming common. In this study, we made an NIDS (Network Intrusion Detection Syst... [more] | VLD2020-59 CPSY2020-42 RECONF2020-78 pp.113-118 |
| RECONF | 2020-09-10 14:20 |
Online | Online | Development of Multi-tenant Resource Management for Multi-FPGA Cloud Systems Miho Yamakura (Keio Univ./AIST), Ryousei Takano, Akram Ben Ahmed (AIST), Hideharu Amano (Keio Univ.) RECONF2020-21 |
(To be available after the conference date) [more] | RECONF2020-21 pp.13-18 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2020-02-27 14:50 |
Kagoshima | Yoron-cho Chuou-Kouminkan | Low-Latency Memory Packet Network Using Bypassing Yoshiya Shikama, Ryuta Kawano, Akram Ben Ahmed, Hiroki Matsutani (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.) CPSY2019-93 DC2019-99 |
(To be available after the conference date) [more] | CPSY2019-93 DC2019-99 pp.7-12 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-06 10:30 |
Hiroshima | Satellite Campus Hiroshima | Multi-FPGA implementation of deep learning applications Kazusa Musha, Akram Ben Ahmed (Keio Univ.), Kudoh Tomohiro (Univ. of Tokyo), Hideharu Amano (Keio Univ.) RECONF2018-40 |
FiC (Flow-in-Cloud) -SW is an FPGA-based switch board for deep learning applications. In this paper, we implemented a de... [more] | RECONF2018-40 pp.33-38 |
| RECONF | 2018-09-18 10:50 |
Fukuoka | LINE Fukuoka Cafe Space | Keita Azegami, Kazusa Musha, Kazuei Hironaka, Akram Ben Ahmed, Hideharu Amano (Keio Univ.) RECONF2018-29 |
(To be available after the conference date) [more] | RECONF2018-29 pp.55-59 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-30 09:00 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | Development and evaluation of on-chip body bias tuning scheme Hayate Okuhara, Akram Ben Ahmed, Hideharu Amano (Keio Univ.) CPSY2016-54 |
[more] | CPSY2016-54 pp.35-40 |
| RECONF | 2016-05-19 16:55 |
Kanagawa | FUJITSU LAB. | Fine-grained body bias control to minimize leakage current of CGRA Hayate Okuhara, Johannes Maximilian Kuehn, Akram Ben Ahmed, Hideharu Amano (Keio Univ.) RECONF2016-15 |
[more] | RECONF2016-15 pp.71-76 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-02 16:45 |
Nagasaki | Nagasaki Kinro Fukushi Kaikan | An implementation and preliminary evaluation of a dynamic body bias control scheme for a low power micro controller using SOTB MOSFET Hayate Okuhara (Keio Univ.), Tomoaki Koide (UEC), Johannes maximilian kuehn, Akram Ben Ahmed (Keio Univ.), Koichiro Ishibashi (UEC), Hideharu Amano (Keio Univ.) CPSY2015-71 |
[more] | CPSY2015-71 pp.57-62 |
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