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All Technical Committee Conferences (Searched in: All Years)
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| Search Results: Conference Papers |
| Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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| Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
| ICD, IPSJ-ARC |
2006-06-09
13:30 |
Kanagawa |
(Kanagawa) |
A VLIW Single-Chip Multi-Processor for Multimedia processing
Masahiko Toichi, Atsuhiro Suga, Fumihiko Hayakawa, Shinichiro Tago, Satoshi Imai, Atsushi Tanaka (Fujitsu Lab) |
[more] |
ICD2006-55
pp.83-88 |
| SIP, ICD, IE, IPSJ-SLDM |
2005-10-21
10:30 |
Miyagi |
Ichinobo, Sakunami-Spa (Miyagi) |
Single-Chip Multi-Processor Integrating Quadruple 8-Way VLIW Processors
Atsushi Tanaka, Atsuhiro Suga, Fumihiko Hayakawa, Shinichiro Tago, Satoshi Imai (Fujitsu Lab) |
To realize the low power consumption and low-cost equipment needed to encode high-definition broadcasts, we have develo... [more] |
SIP2005-119 ICD2005-138 IE2005-83
pp.25-29 |
| ICD |
2005-05-26
10:30 |
Hyogo |
Kobe Univ. (Hyogo) |
A Single-Chip Multi-Processor integrating Quadruple Processors on 90nm CMOS Process
Ken-ichi Kawasaki, Tetsuyoshi Shiota, Yukihito Kawabe, Wataru Shibamoto, Atsushi Sato, Tetsutaro Hashimoto, Motoaki Matsumura, Hiroshi Okano, Fumihiko Hayakawa, Shinichiro Tago, Yasuki Nakamura (Fujitsu Labs.), Hideo Miyake (FLT), Atsuhiro Suga, Hiromasa Takahashi, Atsuki Inoue (Fujitsu Labs.) |
We have developed a 51.2-GOPS single-chip multi-processor integrating quadruple processors with 1.0-GB/s system-bus dire... [more] |
ICD2005-21
pp.7-12 |
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