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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 11 of 11  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
PRMU, SP 2017-06-22
15:15
Miyagi   Comparisons on Transplant Emotional Expressions in DNN-based TTS Synthesis
Katsuki Inoue, Sunao Hara, Masanobu Abe (Okayama Univ.), Nobukatsu Hojo, Yusuke Ijima (NTT) PRMU2017-29 SP2017-5
Recent studies have shown that DNN-based speech synthesis can generate more natural synthesized speech than the conventi... [more] PRMU2017-29 SP2017-5
pp.23-28
NS 2014-10-16
14:20
Shimane Matsue Terrsa [Poster Presentation] A Cooperative Routing Method with Shared Node in Heterogeneous Wireless Sensor Networks
Natsuki Inoue, Kazuhiko Kinoshita (Osaka Univ.), Yosuke Tanigawa, Hideki Tode (Osaka Pref Univ.), Takashi Watanabe (Osaka Univ.) NS2014-114
In a wireless sensor network (WSN), one of the most important challenges is to extend the network lifetime. Recently, tw... [more] NS2014-114
pp.59-62
ICD, SDM 2012-08-02
10:35
Hokkaido Sapporo Center for Gender Equality, Sapporo, Hokkaido [Invited Lecture] Comparison between power gating and DVFS from the view point of energy efficiency
Atsuki Inoue, Eiji Yoshida (Fujitsu Lab. Ltd.) SDM2012-66 ICD2012-34
 [more] SDM2012-66 ICD2012-34
pp.17-21
RCS, NS, USN
(Joint)
2012-07-20
13:50
Iwate Iwate Univ. A Cooperative Routing Method with Shared Nodes for Overlapped Wireless Sensor Networks
Natsuki Inoue, Kazuhiko Kinoshita (Osaka Univ.), Yosuke Tanigawa, Hideki Tode (OPU), Koso Murakami (Osaka Univ.) NS2012-50
In a wireless sensor network(WSN), one of the most important challenges
is to extend the network lifetime, since it is... [more]
NS2012-50
pp.31-36
CAS 2012-01-19
16:15
Fukuoka Kyushu Univ. [Invited Talk] Control Techniques of Power Supply Voltage for Low Power LSI
Ken-ichi Kawasaki, Hiroshi Okano, Hisanori Fujisawa, Atsuki Inoue (Fujitsu Lab.) CAS2011-99
It is effective means that power supply voltage is lowered or turned off depending on system usage for suppressing power... [more] CAS2011-99
pp.77-81
ICD, SDM 2010-08-26
13:25
Hokkaido Sapporo Center for Gender Equality Design Constraint of Fine Grain Supply Voltage Control LSI -- In the case of Power Gating Technique --
Atsuki Inoue (Fujitsu Lab. Ltd.) SDM2010-132 ICD2010-47
Supply voltage control technique for realizing low power LSI is utilized not only for general purpose processors but als... [more] SDM2010-132 ICD2010-47
pp.45-49
ICD, SDM 2010-08-26
13:50
Hokkaido Sapporo Center for Gender Equality Design Constraint of Fine Grain Supply Voltage Control LSI -- In the case of DVFS Technique --
Atsuki Inoue (Fujitsu Lab. Ltd.) SDM2010-133 ICD2010-48
Supply voltage control technique for realizing low power LSI is utilized not only for general purpose processors but als... [more] SDM2010-133 ICD2010-48
pp.51-54
ICD, SDM 2008-07-18
09:50
Tokyo Kikai-Shinko-Kaikan Bldg. A Sub-μs Wake-up Time Power Gating Technique with Bypass Power Line for Rush Current Support
Koichi Nakayama, Ken-ichi Kawasaki, Tetsuyoshi Shiota, Atsuki Inoue (Fujitsu Lab.) SDM2008-141 ICD2008-51
A sub-$\micro$s wake-up power gating technique was developed for low power SOCs. It uses two types of power switches and... [more] SDM2008-141 ICD2008-51
pp.77-82
ICD, ITE-IST 2007-07-26
09:45
Hyogo   On-Die Supply-Voltage Noise Sensor with Real-Time Sampling Mode for Low-Power Processor Applications
Tomio Sato, Atsuki Inoue, Tetsuyoshi Shiota, Tomoko Inoue, Yukihito Kawabe, Tetsutaro Hashimoto (Fujitsu Lab.), Toshifumi Imamura, Yoshitaka Murasaka, Makoto Nagata, Atsushi Iwata (A-R-Tec) ICD2007-40
The real time on-die noise sensor reported here can continuously detect up to 100 noise events per a second without dist... [more] ICD2007-40
pp.17-22
ICD, SDM 2006-08-17
09:55
Hokkaido Hokkaido University A supply voltage adjustment technique for low power consumption and its application to SOCs with multiple threshold voltage CMOS
Hiroshi Okano, Tetsuyoshi Shiota, Yukihito Kawabe (Fujitsu lab.), Wataru Shibamoto (Fujitsu), Tetsutaro Hashimoto, Atsuki Inoue (Fujitsu lab.)
An energy-saving technique for SOCs using multiple threshold voltage CMOS was developed. It uses process sensors and pro... [more] SDM2006-127 ICD2006-81
pp.13-18
ICD 2005-05-26
10:30
Hyogo Kobe Univ. A Single-Chip Multi-Processor integrating Quadruple Processors on 90nm CMOS Process
Ken-ichi Kawasaki, Tetsuyoshi Shiota, Yukihito Kawabe, Wataru Shibamoto, Atsushi Sato, Tetsutaro Hashimoto, Motoaki Matsumura, Hiroshi Okano, Fumihiko Hayakawa, Shinichiro Tago, Yasuki Nakamura (Fujitsu Labs.), Hideo Miyake (FLT), Atsuhiro Suga, Hiromasa Takahashi, Atsuki Inoue (Fujitsu Labs.)
We have developed a 51.2-GOPS single-chip multi-processor integrating quadruple processors with 1.0-GB/s system-bus dire... [more] ICD2005-21
pp.7-12
 Results 1 - 11 of 11  /   
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