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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 6 of 6  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM 2020-01-28
14:45
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Can in-memory/Analog Accelerators be a Silver Bullet for Energy-efficient Inference?
Jun Deguchi, Daisuke Miyashita, Asuka Maki, Shinichi Sasaki, Kengo Nakata, Fumihiko Tachibana, Ryuichi Fujimoto (KIOXIA) SDM2019-85
This presentation introduces and discuss recent trends on in-memory/analog computing for deep learning inference, which ... [more] SDM2019-85
p.11
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]
2019-11-15
10:45
Ehime Ehime Prefecture Gender Equality Center [Keynote Address] Co-optimization of hardware architecture and algorithm for energy-efficient CNN inference
Daisuke Miyashita (Kioxia) VLD2019-47 ICD2019-36 IE2019-42 CPSY2019-46 DC2019-71 RECONF2019-42
(To be available after the conference date) [more] VLD2019-47 ICD2019-36 IE2019-42 CPSY2019-46 DC2019-71 RECONF2019-42
p.173(VLD), p.41(ICD), p.41(IE), p.53(CPSY), p.173(DC), p.31(RECONF)
ICD 2014-04-17
10:20
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] 66.3KIOPS-Random-Read 690MB/s-Sequential-Read Universal Flash Storage Device Controller with Unified Memory Extension
Kenichiro Yoshii, Konosuke Watanabe, Nobuhiro Kondo, Kenichi Maeda, Toshio Fujisawa, Junji Wadatsumi, Daisuke Miyashita, Shouhei Kousai, Yasuo Unekawa, Shinsuke Fujii, Takuma Aoyama, Takayuki Tamura, Atsushi Kunimatsu, Yukihito Oowaki (Toshiba) ICD2014-2
The world’s first embedded NAND storage device controller with Unified Memory (UM) has been demonstrated. UM achieves 2 ... [more] ICD2014-2
pp.3-8
SDM, ICD 2013-08-02
11:15
Ishikawa Kanazawa University [Invited Talk] An LDPC Decoder with Time Domain Analog and Digital Mixed Signal Processing
Daisuke Miyashita, Ryo Yamaki (Toshiba), Kazunori Hashiyoshi (Toshiba Microelectronics), Hiroyuki Kobayashi, Shouhei Kousai, Yukihito Oowaki, Yasuo Unekawa (Toshiba) SDM2013-79 ICD2013-61
Analog computation is potentially more efficient in certain arithmetic operations since a single wire can represent mult... [more] SDM2013-79 ICD2013-61
pp.71-76
SIP, ICD, IE, IPSJ-SLDM 2005-10-21
09:00
Miyagi Ichinobo, Sakunami-Spa A Phase Noise Minimization of CMOS LC-VCOs Over Wide Tuning Range and Large PVT Variations
Daisuke Miyashita, Hiroki Ishikuro, Shouhei Kousai, Hiroyuki Kobayashi, Hideaki Majima, Kenichi Agawa, Mototsugu Hamada (Toshiba Corp.)
An automatic amplitude control circuit to minimize the phase noise of a LC-VCO is proposed and implemented by a 0.18-μm ... [more] SIP2005-115 ICD2005-134 IE2005-79
pp.1-5
ICD, SDM 2005-08-19
08:55
Hokkaido HAKODATE KOKUSAI HOTEL A Low-IF CMOS Single-Chip Bluetooth EDR Transmitter with Digital I/Q Mismatch Trimming Circuit
Hiroki Ishikuro, Daisuke Miyashita, Taro Shimada, Shouhei Kousai, Hiroyuki Kobayashi, Hideaki Majima, Kenichi Agawa, Mototsugu Hamada, Fumitoshi Hatori (Toshiba)
A single-chip low-IF transmitter for the Bluetooth Enhanced Data Rate (max. 3Mbps) was fabricated in 0.18-um CMOS proces... [more] SDM2005-144 ICD2005-83
pp.7-12
 Results 1 - 6 of 6  /   
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