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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
SDM |
2020-01-28 14:45 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Can in-memory/Analog Accelerators be a Silver Bullet for Energy-efficient Inference? Jun Deguchi, Daisuke Miyashita, Asuka Maki, Shinichi Sasaki, Kengo Nakata, Fumihiko Tachibana, Ryuichi Fujimoto (KIOXIA) SDM2019-85 |
This presentation introduces and discuss recent trends on in-memory/analog computing for deep learning inference, which ... [more] |
SDM2019-85 p.11 |
ICD |
2014-04-18 11:20 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Lecture]
A 27% Active and 85% Standby Power Reduction in Dual-Power-Supply SRAM Using BL Power Calculator and Digitally Controllable Retention Circuit Keiichi Kushida, Fumihiko Tachibana, Osamu Hirabayashi, Yasuhisa Takeyama, Atsushi Kawasumi, Azuma Suzuki, Yusuke Niki, Miyako Shizuno, Sinichi Sasaki, Tomoaki Yabe, Yasuo Unekawa (Toshiba) ICD2014-13 |
This paper presents a dual-power-supply SRAM that reduces active and stand-by power from room temperature (RT) to high t... [more] |
ICD2014-13 pp.65-70 |
ICD |
2013-04-12 13:30 |
Ibaraki |
Advanced Industrial Science and Technology (AIST) |
[Invited Talk]
A Sense-Amplifier-Timing-Generating Circuit Utilizing a Statistical Method for Ultra Low Voltage SRAMs Atsushi Kawasumi, Yasuhisa Takeyama, Osamu Hirabayashi, Keiichi Kushida, Fumihiko Tachibana, Yusuke Niki, Sinichi Sasaki, Tomoaki Yabe (Toshiba) ICD2013-18 |
A variation tolerant sense amplifier timing generator which utilizes a statistical method is proposed. The circuit monit... [more] |
ICD2013-18 pp.91-96 |
ICD |
2013-04-12 14:20 |
Ibaraki |
Advanced Industrial Science and Technology (AIST) |
[Invited Lecture]
A Power-Reduction Scheme for Dual-Power-Supply SRAM Using BL Power Calculator and Digital LDO Miyako Shizuno, Fumihiko Tachibana, Osamu Hirabayashi, Yasuhisa Takeyama, Atsushi Kawasumi, Keiichi Kushida, Azuma Suzuki, Yusuke Niki, Sinichi Sasaki, Tomoaki Yabe, Yasuo Unekawa (Toshiba) ICD2013-19 |
This paper presents a dual-power-supply SRAM that reduces active and stand-by power from room temperature (RT) to high t... [more] |
ICD2013-19 pp.97-102 |
ICD |
2011-04-19 09:55 |
Hyogo |
Kobe University Takigawa Memorial Hall |
A Digitized Replica Bitline Delay Technique for Random-Variation-Tolerant Timing Generation of SRAM Sense Amplifiers Yusuke Niki, Atsushi Kawasumi, Azuma Suzuki, Yasuhisa Takeyama, Osamu Hirabayashi, Keiichi Kushida, Fumihiko Tachibana, Yuki Fujimura, Tomoaki Yabe (Toshiba) ICD2011-9 |
A digitized replica bitline delay technique has been proposed for random-variation-tolerant timing generation of static ... [more] |
ICD2011-9 pp.49-54 |
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