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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
IE, ICD, VLD, IPSJ-SLDM [detail] |
2013-10-08 11:50 |
Aomori |
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A 9-bit, 20MS/s SAR ADC with A Design Strategy by Synthesizing Consideration of Layout-Dependent Effects Gong Chen, Mingyu Li, Qing Dong, Shigetoshi Nakatake (Univ. of Kitakyushu), Bo Yang (Design Algorithm Lab) VLD2013-60 ICD2013-84 IE2013-60 |
In nano-scale manufacturing processes of integrated circuits,
a impact of layout-dependent effects (LDEs)
to circuit p... [more] |
VLD2013-60 ICD2013-84 IE2013-60 pp.77-82 |
IE, SIP, ICD, VLD, IPSJ-SLDM [detail] |
2012-10-19 10:15 |
Iwate |
Hotel Ruiz |
A 9-bit 10MSps SAR ADC with Double Input Range for Supply Voltage Gong Chen, Yu Zhang, Qing Dong, Shigetoshi Nakatake (Univ. of Kitakyushu), Bo Yang, Jing Li (Design Algorithm Lab.) VLD2012-49 SIP2012-71 ICD2012-66 IE2012-73 |
This paper presents a pre-charge VCM-based method for 1.2V 9-bit 10MSps Successive Approximation
Register (SAR) ADC. Th... [more] |
VLD2012-49 SIP2012-71 ICD2012-66 IE2012-73 pp.49-53 |
IPSJ-SLDM, VLD |
2012-05-31 10:20 |
Fukuoka |
Kitakyushu International Conference Center |
A Comparator Energy Model Considering Shallow Trench Isolation by Geometric Programming Gong Chen, Yu Zhang, Bo Yang, Qing Dong, Shigetoshi Nakatake (Kitakyushu Univ.) VLD2012-8 |
In low power analog circuit designs, the current variation caused by the STI stress must be taken into
account. In this... [more] |
VLD2012-8 pp.43-48 |
VLD |
2011-09-26 14:25 |
Fukushima |
University of Aizu |
CMOS Op-amp Circuit Synthesis with Geometric Programming Models for Layout-Dependent Effects Yu Zhang, Gong Chen, Qing Dong, Jing Li, Bo Yang, Shigetoshi Nakatake (Univ. of Kitakyushu) VLD2011-41 |
[more] |
VLD2011-41 pp.5-10 |
VLD |
2011-03-02 16:20 |
Okinawa |
Okinawaken-Danjo-Kyodo-Sankaku Center |
Reusable Constraints of Nano-watt BGR Circuits in CMOS Process Migration Gong Chen, Delong Yin, Bo Yang, Qing Dong, Jing Li, Shigetoshi Nakatake (Univ. of Kitakyushu) VLD2010-123 |
[more] |
VLD2010-123 pp.43-47 |
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