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Committee Date Time Place Paper Title / Authors Abstract Paper #
HWS, VLD [detail] 2020-03-05
11:20		 Okinawa Okinawa Ken Seinen Kaikan
(Cancelled but technical report was issued)		 stochasitc fast estimation of timing error induced circuit lifetime distribution
Hazuki Tomiyama, Yutaka Masuda, Tohru Ishihara (Nagoya Univ.) VLD2019-113 HWS2019-86		 In VLSI design, a designer needs the integrated circuit to keep correct operation under area, power,
and performance co... [more]		 VLD2019-113 HWS2019-86
pp.113-118
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