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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 357  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, RECONF 2025-01-17
09:00
Kanagawa Yokohama Technology Campus Flagship Building (Kanagawa, Online)
(Primary: On-site, Secondary: Online)
A design hackathon aimed at sparking interest in semiconductors with an AI application
Takao Goto, Mizuho Nitami, Hideharu Amano, Atsutake Kosuge, Yuki Mitarai, Jiawei Yu, Yuxuan PAN, Makoto Ikeda (The Univ. of Tokyo) VLD2024-88 RECONF2024-118
Despite the growing calls for strengthening the semiconductor industry and the massive investments being made
in semico... [more]
VLD2024-88 RECONF2024-118
pp.69-74
VLD, RECONF 2025-01-17
16:15
Kanagawa Yokohama Technology Campus Flagship Building (Kanagawa, Online)
(Primary: On-site, Secondary: Online)
An FPGA Implementation Using Non-binary LDPC Code for Continuous-Variable Quantum Key Distribution
Kaijie Wei (Keio Univ.), Devanshu Garg (Blueqat Inc.), Ryutaro Nagai (SCSK Corp.), Takao Tomono (Keio Univ.), Hideharu Amano (U.Tokyo) VLD2024-100 RECONF2024-130
 [more] VLD2024-100 RECONF2024-130
pp.134-139
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] 2024-11-14
11:20
Oita COMPAL HALL (Oita, Online)
(Primary: On-site, Secondary: Online)
Student lab. for entry of the semiconductor education with Agile-chip platform
Hideharu Amano, Atsushi Kosuge, Naonobu Shimamoto, Toru Mogami, Yukinori Ochiai, Hirofumi Sumi, Yurie Inoue, Makoto Ikeda, Yoshio Mita (U. Tokyo) VLD2024-67 ICD2024-85 DC2024-89 RECONF2024-97
 [more] VLD2024-67 ICD2024-85 DC2024-89 RECONF2024-97
pp.226-231
RECONF 2024-09-18
14:15
Niigata (Niigata, Online)
(Primary: On-site, Secondary: Online)
Shell-Role style FPGA chip SLMLET-2 for IoT applications
Hideharu Amano, Takuya Kojima (U. Tokyo), Morihiro Kuga (Kumamoto Univ.), Hayate Okuhara (NUS), Masahiro Iida (Kumamoto Univ.) RECONF2024-54
In recent years, efforts have been underway to enhance the functionality and performance of IoT edge devices, aiming to ... [more] RECONF2024-54
pp.60-65
CPSY, DC, RECONF, IPSJ-ARC [detail] 2024-08-09
17:50
Tokushima Awagin Hall (Tokushima, Online)
(Primary: On-site, Secondary: Online)
CPSY2024-40 DC2024-40 RECONF2024-40 This paper describes automatic circuit partitioning method for multi-FPGAs with high-level synthesis. First, A multi-FPG... [more] CPSY2024-40 DC2024-40 RECONF2024-40
pp.135-140
CPSY, DC, RECONF, IPSJ-ARC [detail] 2024-08-09
18:15
Tokushima Awagin Hall (Tokushima, Online)
(Primary: On-site, Secondary: Online)
A Framework for reducing power consumption of multi-FPGA clusters
Kensuke Iizuka (Keio Univ.), Hideharu Amano (The Univ. of Tokyo) CPSY2024-41 DC2024-41 RECONF2024-41
FPGA clusters are expected to execute the time-critical applications as Multi-access Edge Computing (MEC) servers.
We c... [more]
CPSY2024-41 DC2024-41 RECONF2024-41
pp.141-146
RECONF, VLD 2024-01-29
15:30
Kanagawa AIRBIC Meeting Room 1-4 (Kanagawa, Online)
(Primary: On-site, Secondary: Online)
An FPGA-based data compressor for state vector quantum simulators
Kaijie Wei, Hideharu Amano (Keio Univ.), Ryohei Niwase (Tsukuba Univ.), Takefumi Miyoshi (WasaLabo), Yoshiki Yamaguchi (Tsukuba Univ.) VLD2023-87 RECONF2023-90
A quantum computer simulator is a tool to emulate the operation of a quantum computer on a classical computer. It is a c... [more] VLD2023-87 RECONF2023-90
pp.41-46
RECONF, VLD 2024-01-29
15:55
Kanagawa AIRBIC Meeting Room 1-4 (Kanagawa, Online)
(Primary: On-site, Secondary: Online)
VLD2023-88 RECONF2023-91 Quantum computer simulation is indispensable for quantum algorithm research since the results of real
quantum computers... [more]
VLD2023-88 RECONF2023-91
pp.47-52
RECONF, VLD 2024-01-30
10:30
Kanagawa AIRBIC Meeting Room 1-4 (Kanagawa, Online)
(Primary: On-site, Secondary: Online)
Design space exploration for a CGRA architecture that efficiently handles the Systolic algorithm
Hajime Takishita (Keio Univ.), Takuya Kojima (UTokyo), Hideharu Amano (Keio Univ.) VLD2023-92 RECONF2023-95
 [more] VLD2023-92 RECONF2023-95
pp.71-75
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] 2023-11-17
14:10
Kumamoto Civic Auditorium Sears Home Yume Hall (Kumamoto, Online)
(Primary: On-site, Secondary: Online)
Configuration Data Compression for SLM Fine-grained Reconfigurable Logic
Souhei Takagi, Takuya Kozima, Hideharu Amano (Keio Univ), Morihiro Kuga, Masahiro Iida (Kumamoto Univ) VLD2023-72 ICD2023-80 DC2023-79 RECONF2023-75
SLM (Scalable Logic Module) is a fine-grained reconfigurable logic developed by Kumamoto University, characterized by it... [more] VLD2023-72 ICD2023-80 DC2023-79 RECONF2023-75
pp.215-220
RECONF 2023-09-15
09:55
Tokyo Tokyo University of Agriculture and Technology Koganei campus (Tokyo, Online)
(Primary: On-site, Secondary: Online)
SATA burst data transfer pattern of state vector simulator
Hideharu Amano, Wei Kaijie (Keio Univ.), Ryohei Nisawa (Univ. of Tsukuba), Takefumi Miyoshi (Wasalabo), Yoshiki Yamaguchi (Univ. of Tsukuba) RECONF2023-27
Quantum computer simulation is indispensable for quantum algorithm research since the results of real
quantum computers... [more]
RECONF2023-27
pp.28-33
RECONF 2023-09-15
14:15
Tokyo Tokyo University of Agriculture and Technology Koganei campus (Tokyo, Online)
(Primary: On-site, Secondary: Online)
Library Development for RISC-V FPGA SoCs
Takuya Kojima (UTokyo/JST PRESTO), Yosuke Yanai (Keio Univ.), Hayate Okuhara (NUS), Hideharu Amano (Keio Univ.), Morihiro Kuga, Masahiro Iida (Kumamoto Univ.) RECONF2023-31
 [more] RECONF2023-31
pp.52-57
CPSY, DC, IPSJ-ARC [detail] 2023-08-03
16:50
Hokkaido Hakodate Arena (Hokkaido, Online)
(Primary: On-site, Secondary: Online)
Consideration of Bus Arbitration Method for Inductive Coupling Interface
Hideto Kayashima, Aika Kamei (Keio Univ.), Takuya Kojima (Tokyo Univ.), Hideharu Amano (Keio Univ.) CPSY2023-17 DC2023-17
(To be available after the conference date) [more] CPSY2023-17 DC2023-17
pp.55-60
CPSY, DC, IPSJ-ARC [detail] 2023-08-04
18:20
Hokkaido Hakodate Arena (Hokkaido, Online)
(Primary: On-site, Secondary: Online)
Power Evaluation of "SLMLET" Chip with Mixed RISC-V MP and SLM Reconfiguration Logic
Yosuke Yanai (Keio Univ.), Takuya Kojima (Tokyo Univ./JST PRESTO), Hayate Okuhara (NUS), Hideharu Amano (Keio Univ.), Morihiro Kuga, Masahiro Iida (Kumamoto Univ.) CPSY2023-25 DC2023-25
In recent years, opportunities requiring processing at the IoT edge have been increasing. As a solution, not only conven... [more] CPSY2023-25 DC2023-25
pp.100-105
RECONF 2023-06-09
11:05
Kochi Eikokuji Campus, Kochi University of Technology (Kochi, Online)
(Primary: On-site, Secondary: Online)
A Study of Quantum Computing-Oriented Large-Scale Memory Computation Directly Connected to NVM Storages: Parallel Implementation and Evaluation of Serial ATA Interface on an FPGA
Ryohei Niwase, Hikaru Harasawa, Yoshiki Yamaguchi (Univ. of Tsukuba), Wei Kaijie, Hideharu Amano (Keio Univ.) RECONF2023-9
(To be available after the conference date) [more] RECONF2023-9
pp.46-51
DC, CPSY, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2023-03-24
11:20
Kagoshima Amagi Town Disaster Prevention Center (Tokunoshima) (Kagoshima, Online)
(Primary: On-site, Secondary: Online)
Power Estimation Model for Directly-connected FPGA Clusters
Kensuke Iizuka, Aika Kamei, Kazuei Hironaka, Hideharu Amano (Keio Univ.) CPSY2022-45 DC2022-104
FPGA cluster is a promising platform not only in the cloud but in the 5G wireless base stations with limited power suppl... [more] CPSY2022-45 DC2022-104
pp.66-71
HWS, VLD 2023-03-01
16:25
Okinawa (Okinawa, Online)
(Primary: On-site, Secondary: Online)
Large-scale SAT Solution Search by FPGA Implementation of Attraction-Repulsion Control-Type Amoeba Algorithm
Hideharu Amano, Torao Okuyama (Keio Univ.), Kaori Okoda, Masashi Aono (Amoeba Energy) VLD2022-82 HWS2022-53
(To be available after the conference date) [more] VLD2022-82 HWS2022-53
pp.55-60
IPSJ-SLDM, RECONF, VLD [detail] 2023-01-23
10:30
Kanagawa Raiosha, Hiyoshi Campus, Keio University (Kanagawa, Online)
(Primary: On-site, Secondary: Online)
Multi-FPGA design environment using Cyberworkbench, a high-level synthesis tool
Hiroaki Suzuki (Keio Univ), Wataru Takahashi (NEC), Kazutoshi Wakabayashi (Tokyo Univ), Hideharu Amano (Keio Univ) VLD2022-56 RECONF2022-79
Multi-FPGA systems, in which multiple FPGA boards are directly connected via high-speed serial links, are attracting att... [more] VLD2022-56 RECONF2022-79
pp.1-6
IPSJ-SLDM, RECONF, VLD [detail] 2023-01-24
13:30
Kanagawa Raiosha, Hiyoshi Campus, Keio University (Kanagawa, Online)
(Primary: On-site, Secondary: Online)
Implementing a quantum computer simulator Qulacs on FPGAs
Hideharu Amano, Wei Kaijie (Keio Univ.), Takefumi Miyoshi (Wasalab.), Yoshiki Yamaguchi, Ryohei Niwase (U.niv. of Tsukuba) VLD2022-72 RECONF2022-95
Quantum computer simulation is indispensable for quantum algorithm research since the results of real
quantum computers... [more]
VLD2022-72 RECONF2022-95
pp.74-79
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] 2022-11-29
11:10
Kumamoto   (Kumamoto, Online)
(Primary: On-site, Secondary: Online)
A Message Passing Interface Library for High-Level Synthesis on M-KUBOS Multi-FPGA systems
Kazuei Hironaka, Kensuke Iizuka, Hideharu Amano (Keio Univ.) VLD2022-29 ICD2022-46 DC2022-45 RECONF2022-52
 [more] VLD2022-29 ICD2022-46 DC2022-45 RECONF2022-52
pp.61-66
 Results 1 - 20 of 357  /  [Next]  
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