| IEICE Technical Committee Submission System Conference Schedule |
Online Proceedings [Sign in] Tech. Rep. Archives |
All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| RECONF | 2023-09-14 16:50 |
Tokyo | Tokyo University of Agriculture and Technology Koganei campus (Primary: On-site, Secondary: Online) |
Construction of Visualization Environment for CGRA Operation Verification Makoto Saito, Takuya Kojima, Hideki Takase, Hiroshi Nakamura (UT)  RECONF2023-25 |
[more] | RECONF2023-25 pp.20-21 |
| RECONF | 2023-08-04 14:55 |
Hokkaido | Hakodate Arena (Primary: On-site, Secondary: Online) |
An Elastic FPGA-based Accelerator for Bayesian Network Structure Learning Ryota Miyagi (The Univ. of Tokyo), Ryota Yasudo (Kyoto Univ.), Kentaro Sano (RIKEN), Hideki Takase (The Univ. of Tokyo) RECONF2023-15 |
A Bayesian network is a powerful model for representing knowledge involving uncertainty within discrete random variables... [more] | RECONF2023-15 pp.7-12 |
| RECONF | 2023-06-08 15:10 |
Kochi | Eikokuji Campus, Kochi University of Technology (Primary: On-site, Secondary: Online) |
Study on mapping methods for Elastic CGRA Makoto Saito, Takuya Kojima, Hideki Takase, Hiroshi Nakamura (UT) RECONF2023-1 |
CGRA (Coarse-Grained Reconfigurable Architecture) is an architecture with a two-dimensional array of processing elements... [more] | RECONF2023-1 pp.1-6 |
| HWS, VLD | 2023-03-02 11:00 |
Okinawa | (Primary: On-site, Secondary: Online) |
VLD2022-88 HWS2022-59 |
(To be available after the conference date) [more] | VLD2022-88 HWS2022-59 pp.91-96 |
| RECONF | 2022-06-07 13:25 |
Ibaraki | CCS, Univ. of Tsukuba (Primary: On-site, Secondary: Online) |
Shoin Maeda, Hiroshi Nakamura, Hideki Takase (UT) RECONF2022-2 |
To expand the application area of model predictive control (MPC), a control system design framework that guarantees the ... [more] | RECONF2022-2 pp.7-12 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2022-03-11 14:50 |
Online | Online | GA-based Software Pipeline Scheduling for CGRAs Masato Nakagawa, Takuya Kojima, Hideki Takase, Hiroshi Nakamura (UTokyo) CPSY2021-65 DC2021-99 |
(To be available after the conference date) [more] | CPSY2021-65 DC2021-99 pp.120-125 |
| RECONF | 2021-09-10 15:00 |
Online | Online | Parallel Calculation of Local Scores in Bayesian Network Structure Learning using FPGA Ryota Miyagi (Kyoto Univ.), Hideki Takase (U. Tokyo/JST) RECONF2021-22 |
Bayesian network (BN) is a directed acyclic graph that represents relationships among variables in data sets. Because le... [more] | RECONF2021-22 pp.30-35 |
| RECONF | 2020-05-28 15:15 |
Online | Online | RECONF2020-7 |
A Bayesian network is one of the graphical models that represent the causality or correlation of multiple observed pheno... [more] | RECONF2020-7 pp.37-42 |
| RECONF | 2019-09-19 16:40 |
Fukuoka | KITAKYUSHU Convention Center | [Invited Talk]
ZytleBot: Towards FPGA Integration into ROS-based Autonomous Mobile Robots Yasuhiro Nitta, Sou Tamura, Hideki Takase (Kyoto Univ.) RECONF2019-27 |
[more] | RECONF2019-27 p.37 |
| RECONF | 2019-05-09 15:45 |
Tokyo | Tokyo Tech Front | Hideki Takase (Kyoto Univ./JST), Kentaro Matsui (Kyoto Univ.), Yoshihiro Ueno (Delight Systems), Masakazu Mori (karabiner.inc), Susumu Yamazaki (Univ. of Kitakyushu) RECONF2019-7 |
(To be available after the conference date) [more] | RECONF2019-7 pp.35-40 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2019-01-30 15:30 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | An integrated development platform of FPGA for ROS-based autonomous mobile robot Sou Tamura, Yasuhiro Nitta, Hideki Takase, Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ) VLD2018-79 CPSY2018-89 RECONF2018-53 |
[more] | VLD2018-79 CPSY2018-89 RECONF2018-53 pp.43-48 |
| RECONF | 2018-05-24 14:55 |
Tokyo | GATE CITY OHSAKI | An feasibility study of an automatic selection method for SW/HW communication interface in SWORDS framework Yasuhiro Nitta, Hideki Takase, Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ.) RECONF2018-8 |
[more] | RECONF2018-8 pp.39-44 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-02 11:40 |
Nagasaki | Nagasaki Kinro Fukushi Kaikan | A Software-Oriented Design and Synthesis Platform for a Construction of Real-Time Systems on Programmable SoCs Takuya Hatayama, Yusuke Tani, Hideki Takase, Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ.) RECONF2015-53 |
We have been developing SWORDS platform, a SoftWare ORiented Design and Synthesis platform.SWORDS platform aims at impro... [more] | RECONF2015-53 pp.27-32 |
| RECONF | 2015-06-20 09:30 |
Kyoto | Kyoto University | A SW/HW Interface Implementation Method in the System Design Environment for Programmable SoCs Yusuke Tani, Takuya Hatayama, Hideki Takase, Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ.) RECONF2015-14 |
A programmable SoC, which integrates processors and FPGA on the same chip, has become attracted attention in embedded sy... [more] | RECONF2015-14 pp.73-78 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB [detail] | 2013-03-14 15:30 |
Nagasaki | Evaluation Environment for Configuration of Floating-Point Unit Arrays Yuya Itoh, Hideki Takase, Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ.) CPSY2012-94 DC2012-100 |
A floating-point unit array that is constructed by connecting floating-point units, is expected to be an excellent archi... [more] | CPSY2012-94 DC2012-100 pp.253-258 |
|
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-27 10:30 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | A speculative execution method for indefinite loops in high level synthesis Tatsuma Araki, Hideki Takase, Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ) VLD2012-76 DC2012-42 |
[more] | VLD2012-76 DC2012-42 pp.99-104 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2011-11-29 09:25 |
Miyazaki | NewWelCity Miyazaki | A Runtime Mechanism for Managing of the Scratch-Pad Memory within Real-Time Operating Systems Hideki Takase, Hiroaki Takada (Nagoya Univ.) VLD2011-68 DC2011-44 |
The scratch-pad memory is a suitable on-chip memory for the embedded system in terms of its real-time predictability and... [more] | VLD2011-68 DC2011-44 pp.97-102 |
| DC, CPSY, IPSJ-SLDM, IPSJ-EMB | 2009-03-05 14:30 |
Niigata | Sado Island Integrated Development Center | SSEST4: Summer School on Embedded System Technologies 4 Hideki Takase (Nagoya Univ.), Taketo Yato (Kanagawa Univ.), Tatsuhiro Oikawa (Tokai Polytechnic College), Eiichiro Iwata (Saitama Univ.), Kentaro Ikeda (Miyazaki Univ.), Hisashi Hata (Toyohashi Univ. of Tech.), Mami Kawaguchi (Gunma Univ.), Atsushi Iino (Tokyo Denki Univ.), Hisumi Takai (Yokohama National Univ.), Hiroshige Nakashima (GAIA System Solutions Inc.), Toshinobu Matsuba, Yu Yoshimura (Nagoya Univ.) CPSY2008-89 DC2008-80 |
This paper reports activities for Summer School on Embedded System Technologies 4 (SSEST4) held on September in 2008. SS... [more] | CPSY2008-89 DC2008-80 pp.7-12 |
| DC, CPSY, IPSJ-SLDM, IPSJ-EMB | 2008-03-27 17:45 |
Kagoshima | Allocation of Scratch-Pad Memory in Non-Preemptive Multi-Task Systems Hideki Takase, Hiroyuki Tomiyama, Hiroaki Takada (Nagoya Univ.) DC2007-102 CPSY2007-98 |
In this paper, we propose three approaches to allocation of scratch-pad memory for non-preemptive fixed-priority multi-t... [more] | DC2007-102 CPSY2007-98 pp.109-114 |
|
[Return to Top Page]