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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 9 of 9  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
HWS, ICD 2022-10-25
11:50		 Shiga
(Primary: On-site, Secondary: Online)		 Optical Microscopic Observation of Semiconductor Devices toward Hardware Trojan Detection
Hirofumi Sakane, Junichi Sakamoto, Shinichi Kawamura (AIST), Makoto Nagata (Kobe Univ.), Yuichi Hayashi (NAIST) HWS2022-34 ICD2022-26		 In this paper we focus on detection of hardware Trojan (HT) in semiconductor devices under a scenario with following ste... [more] HWS2022-34 ICD2022-26
pp.23-28
ICD, HWS [detail] 2020-10-26
14:55		 Online Online Physical-Level Detection Approach against Hardware Trojans inside Semiconductor Chips (II)
Hirofumi Sakane, Shinichi Kawamura, Kentaro Imafuku, Yohei Hori, Makoto Nagata, Yuichi Hayashi, Tsutomu Matsumoto (AIST) HWS2020-35 ICD2020-24		 Hardware Trojans, known to be designed and crafted with malicious intent and deployed to be part of the hardware of the ... [more] HWS2020-35 ICD2020-24
pp.59-64
HWS, ICD [detail] 2019-11-01
16:50		 Osaka DNP Namba SS Bld. Physical-level detection approach against hardware Trojans inside semiconductor chips (I)
Shinichi Kawamura, Kentaro Imafuku, Hirofumi Sakane, Yohei Hori (AIST), Makoto Nagata (AIST/Kobe Univ.), Yuichi Hayashi (AIST/NAIST), Tsutomu Matsumoto (AIST/YNU) HWS2019-65 ICD2019-26		 It is of great concern that malicious hardware should be inserted inside semiconductor chips and on printed circuit boar... [more] HWS2019-65 ICD2019-26
pp.47-52
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2018-03-08
15:50		 Shimane Okinoshima Bunka-Kaikan Bldg. Development of Attaching Security Enhancement Device
Kenji Toda, Kazukuni Kobara, Hirofumi Sakane (AIST) CPSY2017-150 DC2017-106		 A security enhancement device for information processing devices such as PCs and servers are developed. By attaching th... [more] CPSY2017-150 DC2017-106
pp.281-287
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2017-03-10
10:10		 Okinawa Kumejima Island Information Protection Method and Implementation Utilizing Hardware Monitoring of Disk I/O
Kenji Toda, Kazukuni Kobara, Hirofumi Sakane (AIST) CPSY2016-146 DC2016-92		  [more] CPSY2016-146 DC2016-92
pp.303-308
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2008-11-18
15:20		 Fukuoka Kitakyushu Science and Research Park Development of Side-channel Attack Standard Evaluation BOard and Tool
Yohei Hori, Toshihiro Katashita, Hirofumi Sakane, Kenji Toda, Akashi Satoh (National Institute of Advanced Industrial Science and Technology), Hideki Imai (Chuo Univ.) RECONF2008-54		 Side-channel Attack Standard Evaluation BOards (SASEBO) and their
analysis tools are developed to provide uniform exp... [more]		 RECONF2008-54
pp.87-92
RECONF 2008-05-22
13:50		 Fukushima The University of Aizu Bitstream encryption and authentication with AES-GCM in dynamically reconfigurable systems
Yohei Hori, Akashi Satoh, Hirofumi Sakane, Kenji Toda (AIST) RECONF2008-3		 A high-speed and secure dynamic partial reconfiguration (DPR) system is realized with AES-GCM that guarantees both confi... [more] RECONF2008-3
pp.13-18
RECONF, CPSY, VLD, IPSJ-SLDM 2008-01-16
14:45		 Kanagawa Hiyoshi Campus, Keio University A study of the effectiveness of dynamic partial reconfiguration for size and power reduction
Yohei Hori, Hirofumi Sakane, Kenji Toda (AIST) VLD2007-110 CPSY2007-53 RECONF2007-56		 We evaluated the effectiveness of the partial reconfiguration in reducing area and power consumption of an FPGA-based ci... [more] VLD2007-110 CPSY2007-53 RECONF2007-56
pp.31-36
VLD, CPSY, RECONF, IPSJ-SLDM 2007-01-18
15:20		 Tokyo Keio Univ. Hiyoshi Campus Design and Implementation of Self Run-time Partial Reconfiguration System
Yohei Hori (AIST), Hiroyuki Yokoyama (KDDI Labs.), Hirofumi Sakane, Kenji Toda (AIST) 		We describe a design approach and its application of an FPGA-based system that utilizes self run-time partial reconfigur... [more] VLD2006-104 CPSY2006-75 RECONF2006-75
pp.61-68
 Results 1 - 9 of 9  /   
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