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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD | 2023-04-10 09:55 |
Kanagawa | (Primary: On-site, Secondary: Online) |
[Invited Lecture]
Nonvolatile Storage Cells Using FiCC for IoT Processors with Intermittent Operations Yuki Abe, Kazutoshi Kobayashi (KIT), Jun Shiomi (Osaka Univ.), Hiroyuki Ochi (Ritsumeikan Univ.)  ICD2023-1 |
Energy harvesting is a key technology to supply power for Internet of Things (IoT) devices. Computing devices for IoTs m... [more] | ICD2023-1 pp.1-6 |
| VLD, HWS [detail] | 2022-03-07 14:05 |
Online | Online | Measurement Results of Nonvolatile Flip-Flops Using FiCC for IoT Processors with Intermittent Operations Yuki Abe, Kazutoshi Kobayashi (KIT), Hiroyuki Ochi (Ritsumeikan Univ.) VLD2021-85 HWS2021-62 |
In recent years, with the spread of the Internet of Things (IoT) and mobile devices, low power consumption of processors... [more] | VLD2021-85 HWS2021-62 pp.45-50 |
| HWS, VLD [detail] | 2021-03-03 14:30 |
Online | Online | Measurement of Voltage-variation-tolerant Temperature Sensor for Standard CMOS Chip with On-chip Solar Cell Shuto Murohara, Tatsuya Banno, Tomoya Kimura, Takashi Imagawa, Hiroyuki Ochi (Ritsumeikan Univ.) VLD2020-74 HWS2020-49 |
Aiming at realizing a CMOS-process-compatible external-component-free SoC with an on-chip solar cell and a temperature s... [more] | VLD2020-74 HWS2020-49 pp.32-37 |
| HWS, VLD [detail] | 2020-03-04 11:20 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
A Study of Arithmetic-Oriented Application Implementations for Via-Switch FPGA Takashi Imagawa (Ritsumeikan Univ.), Yu Jaehoon (Tokyo Tech), Masanori Hashimoto (Osaka Univ.), Hiroyuki Ochi (Ritsumeikan Univ.) VLD2019-98 HWS2019-71 |
Via-Switch FPGAs have different features from conventional SRAM-based FPGAs. It is necessary to build the application ci... [more] | VLD2019-98 HWS2019-71 pp.25-29 |
| VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2019-11-14 09:40 |
Ehime | Ehime Prefecture Gender Equality Center | Device characteristic measurement for realizing CMOS-compatible non-volatile memory using FiCC Ippei Tanaka, Naoyuki Miyagawa, Tomoya Kimura, Takashi Imagawa, Hiroyuki Ochi (Ritsumeikan Univ.) VLD2019-36 DC2019-60 |
This report proposes a new non-volatile memory element that can be fabricated with a standard CMOS process, and that can... [more] | VLD2019-36 DC2019-60 pp.63-68 |
| SIS | 2019-03-06 13:20 |
Tokyo | Tokyo Univ. Science, Katsushika Campus | A Study of Low-Energy Video Encoding Method for Raspberry Pi Atsuki Fukumoto, Takashi Imagawa (Ritsumeikan Univ.), Hiroshi Tsutsui, Yoshikazu Miyanaga (Hokkaido Univ.), Hiroyuki Ochi (Ritsumeikan Univ.) SIS2018-38 |
In this paper, we consider energy-efficient video encoding methods which are appropriate for performance-, power- and en... [more] | SIS2018-38 pp.5-9 |
| SIS | 2019-03-07 10:40 |
Tokyo | Tokyo Univ. Science, Katsushika Campus | A Study of Global Motion Compensation for Frame Interpolation with High-Resolution and High-Frame Rate Video Keita Ukihashi, Takashi Imagawa (Ritsumeikan Univ.), Hiroshi Tsutsui, Yoshikazu Miyanaga (Hokkaido Univ.), Hiroyuki Ochi (Ritsumeikan Univ.) SIS2018-47 |
Frame interpolation is a method to realize wireless transmission of high frame-rate and high-resolution video in a senso... [more] | SIS2018-47 pp.53-58 |
| HWS, VLD | 2019-02-27 13:05 |
Okinawa | Okinawa Ken Seinen Kaikan | Wire Load Model for Power Consumption Evaluation of Via-Switch FPGA Asuka Natsuhara, Takashi Imagawa, Hiroyuki Ochi (Ritsumeikan Univ.) VLD2018-97 HWS2018-60 |
In this report, we consider a wire load model for an FPGA using new nano-device called via-switch to allow power estimat... [more] | VLD2018-97 HWS2018-60 pp.25-30 |
| HWS, VLD | 2019-02-28 13:05 |
Okinawa | Okinawa Ken Seinen Kaikan | High-Speed and Noise-Tolerant High-Radix Tree Domino Adder Targeted to 65 nm FD-SOI Technology Kazuki Niino, Takashi Imagawa, Hiroyuki Ochi (Ritsumeikan Univ.) VLD2018-112 HWS2018-75 |
Domino logic was introduced at the forefront of the LSI market in the 2000s for high-speed circuits. In recent years, h... [more] | VLD2018-112 HWS2018-75 pp.115-120 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-07 09:00 |
Hiroshima | Satellite Campus Hiroshima | Design and fabrication of characteristics measurement circuit for CMOS-compatible ultra-low-power non-volatile memory element using FiCC Ippei Tanaka, Naoyuki Miyagawa, Tomoya Kimura, Takashi Imagawa, Hiroyuki Ochi (Ritsumeikan Univ.) VLD2018-65 DC2018-51 |
This report proposes a new non-volatile memory element that can be fabricated with a standard CMOS process, and that can... [more] | VLD2018-65 DC2018-51 pp.183-188 |
| VLD, HWS (Joint) |
2018-02-28 15:00 |
Okinawa | Okinawa Seinen Kaikan | A Study on Quality Improvement of Frame Interpolation Method with High-Resolution and High-Frame Rate Video Using Foreground Elimination and Contour Extraction Hirofumi Ihara, Takashi Imagawa (Ritumeikan Univ), Hiroki Uesaka, Shingo Kokami, Hiroshi Tsutsui, Yoshikazu Miyanaga (Hokkaido Univ), Hiroyuki Ochi (Ritumeikan Univ) VLD2017-98 |
Frame interpolation is one of methods to realize wireless transmission of high frame-rate and high resolution video unde... [more] | VLD2017-98 pp.55-60 |
| IPSJ-ARC, VLD, CPSY, RECONF, IPSJ-SLDM [detail] | 2018-01-19 11:05 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | A study on the power efficiency of via-switch oriented programmable logic 0-1-A-~A LUT Asuka Natsuhara, Takashi Imagawa, Hiroyuki Ochi (Ritsumeikan Univ.) VLD2017-80 CPSY2017-124 RECONF2017-68 |
This paper quantitatively shows the superiority of 0-1-$A$-$overline{A}$ LUT to 0-1 LUT in terms of area, delay time and... [more] | VLD2017-80 CPSY2017-124 RECONF2017-68 pp.107-112 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2017-11-07 09:00 |
Kumamoto | Kumamoto-Kenminkouryukan Parea | Novel Implementation of FFT for Mixed Grained Reconfigurable Architecture Using Via-switch Tetsuaki Fujimoto (Ritsumeikan Univ.), Wataru Takahashi, Kazutoshi Wakabayashi (NEC), Takashi Imagawa, Hiroyuki Ochi (Ritsumeikan Univ.) VLD2017-38 DC2017-44 |
This report proposes an optimal implementation of FFT circuit for mixed grained reconfigurable architecture using via-sw... [more] | VLD2017-38 DC2017-44 pp.67-72 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2017-11-07 09:25 |
Kumamoto | Kumamoto-Kenminkouryukan Parea | Routing method considering programming constraint of reconfigurable device using via-switch crossbars Kosei Yamaguchi, Takashi Imagawa, Hiroyuki Ochi (Ritsumeikan Univ.) VLD2017-39 DC2017-45 |
This report proposes a new routing method that considers constraint on the programming of switches in the reconfigurable... [more] | VLD2017-39 DC2017-45 pp.73-78 |
| SIP, CAS, MSS, VLD | 2017-06-19 10:40 |
Niigata | Niigata University, Ikarashi Campus | Placement Algorithm for Mixed-Grained Reconfigurable Architecture with Dedicated Carry Chain Koki Honda, Takashi Imagawa, Hiroyuki Ochi (Ritsumeikan Univ.) CAS2017-4 VLD2017-7 SIP2017-28 MSS2017-4 |
This paper proposes a placement algorithm using analytical placement (AP) and low-temperature simulated annealing (SA) f... [more] | CAS2017-4 VLD2017-7 SIP2017-28 MSS2017-4 pp.19-24 |
| SIP, CAS, MSS, VLD | 2017-06-19 11:00 |
Niigata | Niigata University, Ikarashi Campus | Selectable Grained Reconfigurable Architecture (SGRA) and Its Design Automation Ryosuke Koike, Takashi Imagawa (Ritsumeikan Univ.), Roberto Yusi Omaki (Synthesis), Hiroyuki Ochi (Ritsumeikan Univ.) CAS2017-5 VLD2017-8 SIP2017-29 MSS2017-5 |
In this paper, we describe a Selectable Grained Reconfigurable Architecture (SGRA) in which each Configurable Logic Bloc... [more] | CAS2017-5 VLD2017-8 SIP2017-29 MSS2017-5 pp.25-30 |
| SIP, CAS, MSS, VLD | 2017-06-20 13:00 |
Niigata | Niigata University, Ikarashi Campus | [Panel Discussion]
The role of System and Signal Processing Subsociety
-- A milestone of tutorial lecture -- Yoshihiro Kaneko (Gifu Univ.), Hideaki Okazaki (Shonan Inst. of Tech.), Hiroyuki Ochi (Ritsumeikan Univ.), Shogo Muramatsu (Niigata Univ.), Ichiro Toyoshima (Toshiba) CAS2017-19 VLD2017-22 SIP2017-43 MSS2017-19 |
[more] | CAS2017-19 VLD2017-22 SIP2017-43 MSS2017-19 p.99 |
| SIP, CAS, MSS, VLD | 2017-06-20 15:10 |
Niigata | Niigata University, Ikarashi Campus | CMOS-compatible Temperature and Illuminance Sensor for Solar-cell-embedded Chip Tatsuya Banno, Tomoya Kimura, Takashi Imagawa, Hiroyuki Ochi (Ritsumeikan Univ.) CAS2017-22 VLD2017-25 SIP2017-46 MSS2017-22 |
This paper proposes a temperature and illuminance sensor circuit that operates with about 0.5 V supply voltage harvested... [more] | CAS2017-22 VLD2017-25 SIP2017-46 MSS2017-22 pp.113-118 |
| VLD | 2017-03-02 09:25 |
Okinawa | Okinawa Seinen Kaikan | FiCC: Crosstalk Noise Hardened Metal Fringe Capacitor for High Integration Naoyuki Miyagawa, Tomoya Kimura, Hiroyuki Ochi (Ritsumeikan Univ.) VLD2016-109 |
In this paper, we propose Fishbone-in-Cage Capacitor (FiCC) that is a new variant of metal fringe capacitor (MFC), and s... [more] | VLD2016-109 pp.43-47 |
| SDM | 2017-02-06 14:10 |
Tokyo | Tokyo Univ. | [Invited Talk]
Large Scale Crossbar Switch Block (CSB) with Via-Switch for a Low-Power FPGA Naoki Banno, Munehiro Tada, Koichiro Okamoto, Noriyuki Iguchi, Toshitsugu Sakamoto, Hiromitsu Hada (NEC Corp.), Hiroyuki Ochi (Ritsumeikan Univ.), Hidetoshi Onodera (Kyoto Univ.), Masanori Hashimoto (Osaka Univ.), Tadahiko Sugibayashi (NEC Corp.) SDM2016-144 |
[more] | SDM2016-144 pp.29-34 |
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