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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2014-11-28
13:30		 Oita B-ConPlaza [Invited Talk] A 56-Gb/s Receiver Front-End with a CTLE and 1-Tap DFE in 20-nm CMOS
Yasufumi Sakai, Takayuki Shibasaki, Takumi Danjo, Hisakatsu Yamaguchi, Toshihiko Mori, Yoichi Koyanagi, Hirotaka Tamura (Fujitsu LAB.) VLD2014-96 CPM2014-127 ICD2014-70 CPSY2014-84 DC2014-50 RECONF2014-45		 To meet ever-increasing demands for computing power in data centers, data rates over 50Gbps/signal (e.g., OIF CEI-56G-VS... [more] VLD2014-96 CPM2014-127 ICD2014-70 CPSY2014-84 DC2014-50 RECONF2014-45
pp.167-172(VLD), pp.27-32(CPM), pp.27-32(ICD), pp.69-74(CPSY), pp.167-172(DC), pp.63-68(RECONF)
ICD, SDM 2006-08-17
16:10		 Hokkaido Hokkaido University A 20-GHz Injection-Locked LC Divider with a 25-% Locking Range
Takayuki Shibasaki (Keio Univ.), Hirotaka Tamura, Kouichi Kanda, Hisakatsu Yamaguchi, Junji Ogawa (Fujitsu Laboratories LTD.), Tadahiro Kuroda (Keio Univ.) 		 [more] SDM2006-138 ICD2006-92
pp.75-79
ICD 2005-12-16
13:50		 Kochi   A 0.8-1.3V 16-channel 2.5Gbps High-speed Serial Transceiver in a 90nm Standard CMOS Process
Yoshiyasu Doi (Fujitsu Labs.), Syunitirou Masaki, Takaya Chiba (Fujitsu), Hirohito Higashi, Hisakatsu Yamaguchi, Hideki Takauchi, Hideki Ishida (Fujitsu Labs.), Kohtaroh Gotoh (Fujitsu), Junji Ogawa, Hirotaka Tamura (Fujitsu Labs.) 		We describe a 16-channel 2.5Gb/s low-power transceiver that operates off a single supply voltage ranging from 0.8V to 1.... [more] ICD2005-201
pp.55-60
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