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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| IMQ, IE, MVE, CQ (Joint) [detail] |
2023-03-17 12:50 |
Okinawa | Okinawaken Seinenkaikan (Naha-shi) (Primary: On-site, Secondary: Online) |
Study on the Effectiveness of Price Comparison for the Energy Interchange among EV Users Shotaro Sakaguchi (Kwansei Gakuin Univ), Keita Tatebe, Yusuke Sakumoto (Kwansei Gakuin Univ.), Ittetsu Taniguchi (Osaka Univ.)  CQ2022-105 |
In recent years, there has been a growing movement to actively introduce renewable energy generation (e.g., solar energy... [more] | CQ2022-105 pp.131-136 |
| MSS, SS | 2023-01-10 13:30 |
Osaka | (Primary: On-site, Secondary: Online) |
[Invited Talk]
Thermal Comfort Aware Online Energy Management Framework for Smart Building: An Experimental Study Daichi Watari, Ittetsu Taniguchi (Osaka Univ.), Francky Catthoor (IMEC/KUL), Charalampos Marantos (NTUA), Kostas Siozios (AUTH), Elham Shirazi (UT), Dimitrios Soudris (NTUA), Takao Onoye (Osaka Univ.) MSS2022-45 SS2022-30 |
This report presents a real-time energy management system for buildings that uses solar power generation and thermal com... [more] | MSS2022-45 SS2022-30 pp.5-6 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2021-12-02 09:45 |
Online | Online | Routing of Delivery Drones with Load- and Wind-Dependent Flight Speed Satoshi Ito, Keishi Akaiwa, Yusuke Funabashi, Hiroki Nishikawa, Xiangbo Kong (Ritsumeikan Univ.), Ittetsu Taniguchi (Osaka Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2021-33 ICD2021-43 DC2021-39 RECONF2021-41 |
Drone-based package delivery is expected to be a promising way to solve the last mile problem. The flight speed of drone... [more] | VLD2021-33 ICD2021-43 DC2021-39 RECONF2021-41 pp.93-98 |
| SIP, CAS, VLD, MSS | 2021-07-05 16:25 |
Online | Online | Thermal Comfort Aware Real-time Co-scheduling of HVAC, Battery System, and Smart Appliances for Smart Building Daichi Watari, Ittetsu Taniguchi (Osaka Univ.), Francky Catthoor (IMEC/KUL), Charalampos Marantos (NTUA), Kostas Siozios (AUTH), Elham Shirazi (IMEC/KUL), Dimitrios Soudris (NTUA), Takao Onoye (Osaka Univ.) CAS2021-8 VLD2021-8 SIP2021-18 MSS2021-8 |
Building energy management is vital for reducing electricity costs and maximizing occupant comfort. This paper proposes ... [more] | CAS2021-8 VLD2021-8 SIP2021-18 MSS2021-8 pp.36-41 |
| HWS, VLD | 2019-02-27 11:15 |
Okinawa | Okinawa Ken Seinen Kaikan | A Case Study on Approximate Multipliers for MNIST CNN Kenta Shirane, Takahiro Yamamoto (Ritsumeikan Univ.), Ittetsu Taniguchi (Osaka Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2018-95 HWS2018-58 |
[more] | VLD2018-95 HWS2018-58 pp.13-18 |
| HWS, VLD | 2019-02-27 14:30 |
Okinawa | Okinawa Ken Seinen Kaikan | Function-level Module Sharing with High-level Synthesis Ryohei Nozaki (Ritsumeikan Univ.), Ittetsu Taniguchi (Osaka Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2018-100 HWS2018-63 |
High-Level Synthesis (HLS) which automatically synthesizes a Resister-Transfer Level (RTL) circuit from a behavioral des... [more] | VLD2018-100 HWS2018-63 pp.43-48 |
| HWS, VLD | 2019-02-27 14:55 |
Okinawa | Okinawa Ken Seinen Kaikan | High-Level Synthesis of the CHStone Benchmark Programs with SDSoC Takuya Adachi (Ritsumeikan Univ.), Ittetsu Taniguchi (Osaka Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2018-101 HWS2018-64 |
In recent years, High-Level Synthesis (HLS), which automatically generates hardware circuits from software program, have... [more] | VLD2018-101 HWS2018-64 pp.49-54 |
| HWS, VLD | 2019-02-27 16:20 |
Okinawa | Okinawa Ken Seinen Kaikan | A Battery Degradation aware System Level Battery Management Methodology Daichi Watari, Ittetsu Taniguchi, Takao Onoye (Osaka Univ.) VLD2018-104 HWS2018-67 |
The battery degradation is a serious problem for the modern electrical systems. This paper proposes State of Health (SOH... [more] | VLD2018-104 HWS2018-67 pp.67-72 |
| HWS, VLD | 2019-02-27 16:45 |
Okinawa | Okinawa Ken Seinen Kaikan | Design of an FPGA-based Manycore Architecture with Selective Local/Global Memory Seiya Shirakuni (Ritsumeikan Univ.), Ittetsu Taniguchi (Osaka Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2018-105 HWS2018-68 |
FPGA-based manycore architectures attract an increasing attention in order to realize high-performance embedded systems.... [more] | VLD2018-105 HWS2018-68 pp.73-78 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-05 09:55 |
Hiroshima | Satellite Campus Hiroshima | A Dynamic Programming Algorithm for Energy-aware Routing of Delivery Drones Yusuke Funabashi, Atsuya Shibata, Shunsuke Negoro (Ritsumeikan Univ.), Ittetsu Taniguchi (Osaka Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2018-41 DC2018-27 |
[more] | VLD2018-41 DC2018-27 pp.7-11 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-06 10:30 |
Hiroshima | Satellite Campus Hiroshima | A Case Study on Memory Architecture Exploration for FPGA-based Manycores Seiya Shirakuni (Ritsumeikan Univ.), Ittetsu Taniguchi (Osaka Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2018-53 DC2018-39 |
In the design of high-performance embedded systems, FPGA-based manycores attract an increasing attention. In embedded sy... [more] | VLD2018-53 DC2018-39 pp.101-106 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-06 15:55 |
Hiroshima | Satellite Campus Hiroshima | Malleable Task Scheduling for Energy Minimization on Heterogeneous Multicores Hiroki Nishikawa, Kana Shimada (Ritsumeikan Univ.), Ittetsu Taniguchi (Osaka Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2018-63 DC2018-49 |
[more] | VLD2018-63 DC2018-49 pp.171-176 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-06 16:20 |
Hiroshima | Satellite Campus Hiroshima | Communication-Aware Scheduling for Data-Parallel Tasks Kana Shimada (Ritsumeikan Univ.), Ittetsu Taniguchi (Osaka Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2018-64 DC2018-50 |
[more] | VLD2018-64 DC2018-50 pp.177-182 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-28 10:55 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | Scheduling of Malleable Fork-Join Tasks Kana Shimada, Ittetsu Taniguchi, Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2016-45 DC2016-39 |
This paper studies scheduling of malleable fork-join tasks. In our scheduling problem, each task can be partitioned into... [more] | VLD2016-45 DC2016-39 pp.7-11 |
| RECONF, CPSY, VLD, IPSJ-SLDM [detail] | 2015-01-29 17:20 |
Kanagawa | Hiyoshi Campus, Keio University | A Dual-mode Scheduling Strategy for Task Graphs with Data Parallelism Yang Liu, Lin Meng, Ittetsu Taniguchi, Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2014-128 CPSY2014-137 RECONF2014-61 |
[more] | VLD2014-128 CPSY2014-137 RECONF2014-61 pp.105-109 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-27 10:50 |
Kagoshima | A Hardware/Software Simulator for NoC using SystemC and QEMU Yosuke Kurimoto, Yusuke Fukutsuka, Ittetsu Taniguchi, Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2013-69 DC2013-35 |
[more] | VLD2013-69 DC2013-35 pp.63-68 |
|
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-28 09:20 |
Kagoshima | Function-Level Profiling for Embedded Software with QEMU Tran Van Dung, Ittetsu Taniguchi (Ritsumeikan Univ.), Takuji Hieda (Kyushu Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2013-78 DC2013-44 |
Function-level profiling is crucial for optimized embedded software which needs to have resource constraint, low level p... [more] | VLD2013-78 DC2013-44 pp.125-128 |
|
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-28 11:20 |
Kagoshima | List Scheduling Algorithms for Task Graphs with Data Parallelism Yang Liu, Ittetsu Taniguchi, Hiroyuki Tomiyama, Lin Meng (Ritsumeikan Univ.) VLD2013-90 DC2013-56 |
[more] | VLD2013-90 DC2013-56 pp.215-220 |
|
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-29 11:15 |
Kagoshima | Estimation for Method of Controller Implementation in High-Level Synthesis Ryoya Sobue (Ritsumeikan Univ.), Yuko Hara-Azumi (NAIST), Ittetsu Taniguchi, Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2013-96 DC2013-62 |
[more] | VLD2013-96 DC2013-62 pp.257-262 |
|
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-27 11:20 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | Controller Synthesis for Clock Improvement in Behavioral Synthesis Ryoya Sobue (Ritsumeikan Univ.), Yuko Hara-Azumi (NAIST), Takuji Hieda, Ittetsu Taniguchi, Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2012-78 DC2012-44 |
[more] | VLD2012-78 DC2012-44 pp.111-116 |
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