IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (Searched in: All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 2 of 2  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] 2020-01-24
Kanagawa Raiosha, Hiyoshi Campus, Keio University Partial synthesis method based on Column-wise verification for integer multipliers
Jian Gu, Amir Masoud Gharehbaghi, Masahiro Fujita (UTokyo) VLD2019-89 CPSY2019-87 RECONF2019-79
Partial logic synthesis is a method that most parts of the target circuits are fixed and the missing portions can be log... [more] VLD2019-89 CPSY2019-87 RECONF2019-79
MBE, NC 2019-10-12
Miyagi   Neural Networks with multiple feature extractors for monitoring tissue circulation
Yuki Sunaga, Jian Gu, Koici Kida, Akira Hirose, Yoko Tomioka, Masaki Sekino (The Univ. of Tokyo) MBE2019-40 NC2019-31
(To be available after the conference date) [more] MBE2019-40 NC2019-31
 Results 1 - 2 of 2  /   
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

[Return to Top Page]

[Return to IEICE Web Page]

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan