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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2023-11-15 13:10 |
Kumamoto | Civic Auditorium Sears Home Yume Hall (Primary: On-site, Secondary: Online) |
Frequency Dependence of Soft Error Rates Induced by Alpha-Particle and Heavy Ion Haruto Sugisaki, Ryuichi Nakajima, Shotaro Sugitani, Jun Furuta, Kazutoshi Kobayashi (KIT)  VLD2023-33 ICD2023-41 DC2023-40 RECONF2023-36 |
[more] | VLD2023-33 ICD2023-41 DC2023-40 RECONF2023-36 pp.19-24 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2023-11-15 13:35 |
Kumamoto | Civic Auditorium Sears Home Yume Hall (Primary: On-site, Secondary: Online) |
Data Pattern Dependence of the Total Ionizing Dose Effect in Floating-gate and Charge-trap TLC NAND flash memories Taiki Ozawa, Jun Furuta, Kazutoshi Kobayashi (KIT) VLD2023-34 ICD2023-42 DC2023-41 RECONF2023-37 |
[more] | VLD2023-34 ICD2023-42 DC2023-41 RECONF2023-37 pp.25-30 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2023-11-15 14:00 |
Kumamoto | Civic Auditorium Sears Home Yume Hall (Primary: On-site, Secondary: Online) |
Evaluation of SEU Sensitivity by Alpha-Particle on PMOS and NMOS Transistors in a 65 nm bulk Process Keita Yoshida, Ryuichi Nakajima, Shotaro Sugitani, Takafumi Ito, Jun Furuta, Kazutoshi Kobayashi (KIT) VLD2023-35 ICD2023-43 DC2023-42 RECONF2023-38 |
[more] | VLD2023-35 ICD2023-43 DC2023-42 RECONF2023-38 pp.31-36 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2021-12-01 09:20 |
Online | Online | Soft Errors on Flip-flops Depending on Circuit and Layout Structures Estimated by TCAD Simulations Moeka Kotani, Ryuichi Nakajima (KIT), Kazuya Ioki (ROHM), Jun Furuta, Kazutoshi Kobayashi (KIT) VLD2021-17 ICD2021-27 DC2021-23 RECONF2021-25 |
We compare the soft error tolerance of conventional flip-flops (FFs) and the proposed radiation-hard FF with small area,... [more] | VLD2021-17 ICD2021-27 DC2021-23 RECONF2021-25 pp.1-6 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2020-11-18 14:00 |
Online | Online | Measurement Results of Total Ionizing Dose Effect on Ring Oscillators Fabricated by a Thin-BOX FDSOI Process for Outer-space Mission Takashi Yoshida, Jun Furuta, Kazutoshi Kobayashi (KIT) VLD2020-30 ICD2020-50 DC2020-50 RECONF2020-49 |
The Total Ionizing Dose (TID) effect is one of the major concerns for semiconductor devices in outer space, where high a... [more] | VLD2020-30 ICD2020-50 DC2020-50 RECONF2020-49 pp.110-114 |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-24 15:25 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University | Measuring SER by Neutron Irradiation Between Volatile SRAM-based and Nonvolatile Flash-based FPGAs Yuya Kawano, Yuto Tsukita, Jun Furuta, Kazutoshi Kobayashi (KIT) VLD2019-90 CPSY2019-88 RECONF2019-80 |
[more] | VLD2019-90 CPSY2019-88 RECONF2019-80 pp.217-222 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-07 14:10 |
Hiroshima | Satellite Campus Hiroshima | Ultra-long-term Measurement of Aging Degradation on Ring Oscillators by using FPGA and Micro Controller Hiroki Nakano (KIT), Ryo Kishida (TUS), Jun Furuta, Kazutoshi Kobayashi (KIT) CPM2018-95 ICD2018-56 IE2018-74 |
[more] | CPM2018-95 ICD2018-56 IE2018-74 pp.31-36 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-07 13:45 |
Hiroshima | Satellite Campus Hiroshima | A Radiation-hard Low-delay Flip-Flop with Stacking Structure for SOI Process Mitsunori Ebara, Kodai Yamada, Jun Furuta, Kazutoshi Kobayashi (Kyoto Inst. of Tech.) VLD2018-69 DC2018-55 |
[more] | VLD2018-69 DC2018-55 pp.203-208 |
| SDM, ICD, ITE-IST [detail] | 2018-08-07 11:30 |
Hokkaido | Hokkaido Univ., Graduate School of IST M Bldg., M151 | Comparison of Sensitivity to Soft Errors of NMOS and PMOS Transistors by Using Three Types of Stacking Latches in an FDSOI process Kodai Yamada, Jun Furuta, Kazutoshi Kobayashi (KIT) SDM2018-28 ICD2018-15 |
(To be available after the conference date) [more] | SDM2018-28 ICD2018-15 pp.15-20 |
| VLD, HWS (Joint) |
2018-02-28 17:20 |
Okinawa | Okinawa Seinen Kaikan | Evaluation of a Radiation-Hardened Method and Soft Error Resilience on Stacked Transistors in 28/65 nm FDSOI Processes Haruki Maruoka, Kodai Yamada, Mitsunori Ebara, Jun Furuta, Kazutoshi Kobayashi (KIT) VLD2017-103 |
The continuous downscaling of transistors has resulted in an increase of reliability issues for semiconductor chips. In ... [more] | VLD2017-103 pp.85-90 |
| VLD, HWS (Joint) |
2018-02-28 17:45 |
Okinawa | Okinawa Seinen Kaikan | Evaluation of Soft Error Tolerance on Flip-Flop depending on 65 nm FDSOI Transistor Threshold-Voltage Mitsunori Ebara, Haruki Maruoka, Kodai Yamada, Jun Furuta, Kazutoshi Kobayashi (KIT) VLD2017-104 |
Moore's Law has been miniaturizing integrated circuits, which can make a lot of high performance devices such as PCs an... [more] |
VLD2017-104 pp.91-96 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-28 14:15 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | Evaluation of Radiation-Hard Circuit Structures in a FDSOI Process by TCAD Simulations Kodai Yamada, Haruki Maruoka, Shigehiro Umehara, Jun Furuta, Kazutoshi Kobayashi (KIT) VLD2016-49 DC2016-43 |
According to the Moore's law, LSIs are miniaturized and the reliability of LSIs is degraded. To improve the tolerance ... [more] |
VLD2016-49 DC2016-43 pp.31-36 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-28 14:40 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | Evaluation of Soft Error Hardness of FinFET and FDSOI Processes by the PHITS-TCAD Simulation System Shigehiro Umehara, Jun Furuta, Kazutoshi Kobayashi (KIT) VLD2016-50 DC2016-44 |
The impact of soft errors has been serious with process scaling of integrated circuits. Simulation methods for soft erro... [more] | VLD2016-50 DC2016-44 pp.37-41 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-28 15:05 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | Evaluation of Soft Error Rates of FlipFlops on FDSOI by Heavy Ions Masashi Hifumi, Shigehiro Umehara, Haruki Maruoka, Jun Furuta, Kazutoshi Kobayashi (KIT) VLD2016-51 DC2016-45 |
We evaluate tolerance for soft errors of FFs on a 28/65 nm FDSOI. We fabricated three different layouts of non-redundant... [more] | VLD2016-51 DC2016-45 pp.43-48 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-28 15:30 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | Circuit Simulation Method Using Bimodal Defect-Centric Model of Random Telegraph Noise on 40 nm SiON Process Michitarou Yabuuchi, Azusa Oshima, Takuya Komawaki, Kazutoshi Kobayashi, Ryo Kishida, Jun Furuta (KIT), Pieter Weckx (KUL/IMEC), Ben Kaczer (IMEC), Takashi Matsumoto (Univ. of Tokyo), Hidetoshi Onodera (Kyoto Univ.) VLD2016-52 DC2016-46 |
We propose a circuit analysis method using the bimodal RTN (random telegraph noise) model of the defect-centric distri... [more] |
VLD2016-52 DC2016-46 pp.49-54 |
| ICD, CPSY | 2015-12-18 09:00 |
Kyoto | Kyoto Institute of Technology | Evaluation of Soft Error Tolerance of Redundant Flip-Flop in 65nm Bulk and FD-SOI Processes. Eiji Sonezaki, Kubota Kanto, Masaki Masuda, Shohei Kanda, Jun Furuta, Kazutoshi Kobayashi (KIT) ICD2015-83 CPSY2015-96 |
According to process down scaling, LSI becomes less reliable for soft errors. To increase the tolerance of FFs for soft ... [more] | ICD2015-83 CPSY2015-96 pp.69-74 |
| ICD, CPSY | 2015-12-18 12:40 |
Kyoto | Kyoto Institute of Technology | [Invited Talk]
Evaluation of Radiation-induced Soft Errors on LSI Jun Furuta (KIT) ICD2015-87 CPSY2015-100 |
[more] | ICD2015-87 CPSY2015-100 pp.87-92 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2014-11-26 11:35 |
Oita | B-ConPlaza | Voltage Dependence of Single Event Transient Pulses on 65nm Silicon-on-Thin-BOX and Bulk Processes Eiji Sonezaki, Kuiyuan Zhang, Jun Furuta, Kazutoshi Kobayashi (Kyoto Inst. of Tech.) VLD2014-84 DC2014-38 |
Recently, the growth of power consumption has been serious by process scaling. The lower voltage is most effective to i... [more] |
VLD2014-84 DC2014-38 pp.93-97 |
| VLD | 2014-03-05 10:25 |
Okinawa | Okinawa Seinen Kaikan | Evaluation of Multiple Cell Upsets Considering Parasitic Bipolar Effects Jun Furuta (Kyoto Univ.), Kazutoshi Kobayashi (Kyoto Inst. of Tech.), Hidetoshi Onodera (Kyoto Univ.) VLD2013-157 |
As a result of the process scaling, radiation-induced Multiple Cell Upsets (MCUs) become major issue for LSI reliabilit... [more] |
VLD2013-157 pp.125-130 |
| ICD | 2012-12-18 11:45 |
Tokyo | Tokyo Tech Front | A 65 nm Low-Power Adaptive-Coupling Redundant Flip-Flop Masaki Masuda, Kanto Kubota, Ryosuke Yamamoto (KIT), Jun Furuta (Kyoto Univ.), Kazutoshi Kobayashi (KIT), Hidetoshi Onodera (Kyoto Univ.) ICD2012-117 |
We propose a low-power redundant flip-flop to be operated with high reliability over 1 GHz clock frequency based on the ... [more] | ICD2012-117 pp.109-113 |
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