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Committee Date Time Place Paper Title / Authors Abstract Paper #
MSS 2015-03-06
10:25		 Ishikawa IT Business Plaza Musashi Development of SMT-based model checker for assembly cords using interrupts reduction technique
Junpei Kobashi, Atsushi Takeshita, Satoshi Yamane, Kohei Sakurai (Kanazawa Univ.) MSS2014-100		 Recently, embedded software has properties dependent on hardware (direct operation of address spaces, memory mapped I/O,... [more] MSS2014-100
pp.53-58
SS, MSS 2014-01-31
09:55		 Aichi   Bounded model checking based in SMT for CISC embedded assembly programs
Atsushi Takeshita, Junpei Kobashi, Satoshi Yamane (Kanazawa Univ.) MSS2013-62 SS2013-59		 In this paper,we describe the method of verification by bounded model checking based in SMT using Code Block for embedde... [more] MSS2013-62 SS2013-59
pp.65-70
KBSE 2012-11-22
11:25		 Ishikawa Kanazawa University SMT-based Bounded Model Checking for Assembly program
Junpei Kobashi, Atsushi Takeshita, Satoshi Yamane (Kanazawa Univ.) KBSE2012-41		 In this paper, we state property verification by Bounded Model Checking using SMT solver for register level model of ass... [more] KBSE2012-41
pp.19-24
VLD, CAS, MSS, SIP 2012-07-02
13:00		 Kyoto Kyoto Research Park Verification of embedded software in Assembly code by SMT prover
Atsushi Takeshita, Junpei Kobashi, Satoshi Yamane (Kanazawa Univ.) CAS2012-7 VLD2012-17 SIP2012-39 MSS2012-7		 We propose the technique of Bounded Model Checking(BMC) for embedded assembly program. We use SMT solver for BMC. We als... [more] CAS2012-7 VLD2012-17 SIP2012-39 MSS2012-7
pp.37-42
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