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Committee Date Time Place Paper Title / Authors Abstract Paper #
DC 2012-02-13
11:05
Tokyo Kikai-Shinko-Kaikan Bldg. Pattern Merging for Additional Path Delay Fault Detection with Transition Delay Fault Test
Hiroaki Tanaka, Kohei Miyase, Kazunari Enokimoto, Xiaoqing Wen, Seiji Kajihara (Kyutech) DC2011-78
In this paper, we present to generate a test vector set to detect both transition and path delay faults. The proposed me... [more] DC2011-78
pp.13-18
DC 2011-06-24
16:20
Tokyo Kikai-Shinko-Kaikan Bldg. Low Power At-Speed Scan Testing for LOS Scheme by Test Vector Modification
Kohei Miyase, Yuta Uchinodan, Kazunari Enokimoto (KIT), Yuta Yamato (NAIST), Xiaoqing Wen, Seiji Kajihara (KIT), Fangmei Wu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Arnaud Verazel (Lirmm) DC2011-13
In this paper, we present a test vector modification method to reduce launch-to-capture power for LOS scheme. The propos... [more] DC2011-13
pp.29-34
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