Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
RECONF, VLD |
2024-01-30 15:15 |
Kanagawa |
AIRBIC (Primary: On-site, Secondary: Online) |
Comparison of Graph Data Structures for Breadth-First Search Accelerator HyGTA2 Jun Akimoto, Kazuya Tanigawa (Hiroshima City Univ), Kentaro Sano (Processor Research Team,RIKEN Center for Computational Science), Tetsuo Hironaka (Hiroshima City Univ) |
[more] |
|
RECONF |
2022-06-07 16:15 |
Ibaraki |
CCS, Univ. of Tsukuba (Primary: On-site, Secondary: Online) |
RECONF2022-8 |
[more] |
RECONF2022-8 pp.41-42 |
VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2021-12-02 09:45 |
Online |
Online |
Development of specific cache memory for Hybrid Graph Traversal Algorithm Yushi Haraguchi, Kazuya Tanigawa (HCU), Kentarou Sano (RIKEN), Tetsuo Hironaka (HCU) VLD2021-37 ICD2021-47 DC2021-43 RECONF2021-45 |
[more] |
VLD2021-37 ICD2021-47 DC2021-43 RECONF2021-45 pp.117-122 |
RECONF |
2021-06-08 14:35 |
Online |
Online |
Development of a simulator to explore the accelerator architecture for breadth-first search. Yushi Haraguchi, Kazuya Tanigawa (HCU), Takaaki Miyajima, Jens Huthmann, Kentarou Sano (RIKEN), Tetsuo Hironaka (HCU) RECONF2021-3 |
[more] |
RECONF2021-3 pp.8-13 |
RECONF |
2020-05-29 10:50 |
Online |
Online |
Proposal of Reconfigurable Device Placement Algorithm Using Placement Quality Judgment Neural Network as Cost Function of SA Method Yuichi Natsume, Tokio Kamada, Kubota Atsushi, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ.) RECONF2020-13 |
The circuit performance of reconfigurable devices greatly depends on the place-and-route results, so optimal place-and-r... [more] |
RECONF2020-13 pp.71-76 |
RECONF |
2019-09-19 14:40 |
Fukuoka |
KITAKYUSHU Convention Center |
Study of logic element placement algorithm with cost function by neural network Tokio Kamada, Atsushi Kubota, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ.) RECONF2019-23 |
(To be available after the conference date) [more] |
RECONF2019-23 pp.13-18 |
RECONF |
2019-05-09 13:25 |
Tokyo |
Tokyo Tech Front |
RECONF2019-3 |
(To be available after the conference date) [more] |
RECONF2019-3 pp.11-16 |
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-06 09:25 |
Hiroshima |
Satellite Campus Hiroshima |
Quality determination of logic element placement using deep learning in fine grain reconfigurable device MPLD Hidehito Fujiishi, Tokio Kamada, Tetsuo Hironaka, Kazuya Tanigawa, Atsushi Kubota (Hiroshima city Univ.) VLD2018-48 DC2018-34 |
In CAD for MPLD which is a type of fine grain reconfigurable PLD, the SA method is used as a place-ment method for logic... [more] |
VLD2018-48 DC2018-34 pp.71-76 |
RECONF |
2018-09-18 13:45 |
Fukuoka |
LINE Fukuoka Cafe Space |
Yuji Yamashita, Kubota Atsushi, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ.) RECONF2018-30 |
[more] |
RECONF2018-30 pp.61-66 |
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] |
2018-03-07 14:35 |
Shimane |
Okinoshima Bunka-Kaikan Bldg. |
Daichi Ishizaki, Yoshiki Ebisuhama, Atsushi Kubota, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ.) CPSY2017-134 DC2017-90 |
(To be available after the conference date) [more] |
CPSY2017-134 DC2017-90 pp.83-88 |
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2017-11-07 10:30 |
Kumamoto |
Kumamoto-Kenminkouryukan Parea |
RECONF2017-43 |
(To be available after the conference date) [more] |
RECONF2017-43 pp.37-42 |
RECONF, CPSY, DC, IPSJ-ARC (Joint) [detail] |
2017-05-23 10:35 |
Hokkaido |
Noboribetsu-Onsen Dai-ichi-Takimoto-Kan |
RECONF2017-15 |
(To be available after the conference date) [more] |
RECONF2017-15 pp.75-80 |
RECONF, CPSY, DC, IPSJ-ARC (Joint) [detail] |
2017-05-23 11:50 |
Hokkaido |
Noboribetsu-Onsen Dai-ichi-Takimoto-Kan |
RECONF2017-18 |
(To be available after the conference date) [more] |
RECONF2017-18 pp.93-98 |
CPSY, IPSJ-ARC |
2016-10-06 10:00 |
Chiba |
Makuhari-messe |
[Poster Presentation]
Keigo Teramoto, Yoshiki Ebisuhama, Atsushi Kubota, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ.) CPSY2016-44 |
(To be available after the conference date) [more] |
CPSY2016-44 pp.11-12 |
RECONF |
2016-09-05 16:00 |
Toyama |
Univ. of Toyama |
Tomohiro Tanaka, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ), Takashi Ishiguro (Taiyo Yuden) RECONF2016-30 |
(To be available after the conference date) [more] |
RECONF2016-30 pp.29-34 |
RECONF |
2015-09-19 09:30 |
Ehime |
Ehime University |
Proposal of small reconfigurable device SePLD using selector Keisuke Yamamoto, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ.), Takashi Ishiguro (Taiyo Yuden) RECONF2015-42 |
[more] |
RECONF2015-42 pp.53-58 |
RECONF |
2015-06-19 15:10 |
Kyoto |
Kyoto University |
Consideration of the one-dimensional array processor suitable for a shock tube problem by FPGA Keisuke Hirofuji, Ryo Okuda, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ) RECONF2015-9 |
[more] |
RECONF2015-9 pp.47-52 |
RECONF |
2015-06-20 15:25 |
Kyoto |
Kyoto University |
Consideration of a reconfigurable device MPLD constructed with MLUTs that equips a crossbar switch Naoya Tokusada, Tetsuo Hironaka, Kazuya Tanigawa (HCU), Takashi Ishiguro (Taiyo Yuden) RECONF2015-25 |
[more] |
RECONF2015-25 pp.135-140 |
RECONF |
2014-09-19 13:05 |
Hiroshima |
|
Discussion for speed up of three-dimensional space imaging using sound waves Keiko Oda, Akira Kojima, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ.) RECONF2014-30 |
In general, the most of methods for three-dimensional imaging using sound waves measure the distance of objects by analy... [more] |
RECONF2014-30 pp.75-80 |
RECONF |
2014-09-19 13:30 |
Hiroshima |
|
FPGA implementation of a Compact Processor Yukiyama for tiny SoC Yuichi Watanabe, Kazuya Tanigawa, Tetsuo Hironaka (Hiroshima City Univ.) RECONF2014-31 |
This paper proposes a small soft-core processor architecture that can be mapped
to a CPLD. This paper describes the det... [more] |
RECONF2014-31 pp.81-86 |