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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
ET |
2023-11-11 13:35 |
Kagawa |
Kagawa University Saiwai-cho (Main) Campus / Online (Primary: On-site, Secondary: Online) |
A Proposal and Evaluation of Learning TOEIC Part1 Using a Conversational AI Keiichi Maekawa, Teruhiko Unoki (KGU) |
[more] |
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SDM |
2020-02-07 09:35 |
Tokyo |
Tokyo University-Hongo |
[Invited Talk]
Impact of Homogeneously Dispersed Al Nanoclusters by Si-monolayer Insertion into Hf0.5Zr0.5O2 Film on FeFET Memory Array with Tight Threshold Voltage Distribution Tadashi Yamaguchi, Keiichi Maekawa, Takahiro Ohara, Atsushi Amo, Eiji Tsukuda, Kenichiro Sonoda, Hiroshi Yanagita, Masao Inoue, Masazumi Matsuura, Tomohiro Yamashita (Renesas) SDM2019-89 |
[more] |
SDM2019-89 pp.5-8 |
SDM |
2020-01-28 13:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Impact of Homogeneously Dispersed Al Nanoclusters by Si-monolayer Insertion into Hf0.5Zr0.5O2 Film on FeFET Memory Array with Tight Threshold Voltage Distribution Keiichi Maekawa (renesas) SDM2019-83 |
[more] |
SDM2019-83 pp.5-8 |
SDM |
2016-10-26 15:30 |
Miyagi |
Niche, Tohoku Univ. |
[Invited Talk]
Back-Bias Control Technique for Suppression of Die-to-Die Delay Variability of SOTB CMOS Circuits at Ultralow-Voltage (0.4 V) Operation Hideki Makiyama, Yoshiki Yamamoto, Takumi Hasegawa, Shinobu Okanishi, Keiichi Maekawa, Hiroki Shinkawata, Shiro Kamohara, Yasuo Yamaguchi (Renesas Electronics Corp.), Nobuyuki Sugii (Hitach), Koichiro Ishibashi (The Univ. of Electro-Communications), Tomoko Mizutani, Toshiro Hiramoto (The Univ. of Tokyo) SDM2016-71 |
Small-variability transistors such as silicon on thin buried oxide (SOTB) are effective for reducing the operation volta... [more] |
SDM2016-71 pp.15-20 |
SDM |
2016-10-26 16:10 |
Miyagi |
Niche, Tohoku Univ. |
[Invited Talk]
Ultralow-Voltage Operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM Down to 0.37 V Utilizing Adaptive Back Bias Yoshiki Yamamoto, Hideki Makiyama, Takumi Hasegawa, Shinobu Okanishi, Keiichi Maekawa, Shinkawata Hiroki, Shiro Kamohara, Yasuo Yamaguchi (Renesas), Nobuyuki Sugii (Hitachi), Tomoko Mizutani, Toshiro Hiramoro (UT) SDM2016-72 |
We demonstrated record 0.37V minimum operation voltage (VMIN) of 2Mb Silicon-on-Thin-Buried-oxide (SOTB) 6T-SRAM. Thanks... [more] |
SDM2016-72 pp.21-25 |
ICD |
2015-04-16 13:50 |
Nagano |
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[Invited Lecture]
40 nm Dual-port and Two-port SRAMs for Automotive MCU Applications under the Wide Temperature Range of -40 to 170℃ with Test Screening Against Write Disturb Issues Yoshisato Yokoyama, Yuichiro Ishii, Tatsuya Fukuda, Yoshiki Tsujihashi, Atsushi Miyanishi (Renesas Electronics), Shinobu Asayama, Keiichi Maekawa, Kazutoshi Shiba (Renesas Semiconductor Manufacturing Corporation), Koji Nii (Renesas Electronics) ICD2015-3 |
(To be available after the conference date) [more] |
ICD2015-3 pp.9-14 |
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