Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
PN, NS, OCS (Joint) |
2017-06-15 09:25 |
Akita |
Akita Univ. |
A Green Optical Network by Energy Scaling FEC Soichiro Kametani, Kazuo Kubo, Kenji Ishii, Keisuke Dohi, Takashi Sugihara (Mitsubishi Electric Corp.) PN2017-6 |
Energy saving is urgent issue for sustainable deployment of advanced Information and Telecommunications Society. We prop... [more] |
PN2017-6 pp.1-6 |
PN, NS, OCS (Joint) |
2017-06-16 15:50 |
Akita |
Akita Univ. |
Soft-decision Iterative-demapping for 4-Dimensional Coded APSK Keisuke Dohi, Keisuke Matsuda, Tsuyoshi Yoshida, Takashi Sugihara (Mitsubishi Electric) OCS2017-21 |
(Advance abstract in Japanese is available) [more] |
OCS2017-21 pp.57-62 |
OCS, NS, PN (Joint) |
2016-06-24 12:50 |
Hokkaido |
Hokkaido University |
Impact of Quantization for M-ary QAM with Soft-Decision Error Correction Keisuke Dohi, Kenya Sugihara, Soichiro Kametani, Kazuo Kubo, Takashi Sugihara (MitsubishiElectric) OCS2016-17 |
(Advance abstract in Japanese is available) [more] |
OCS2016-17 pp.43-48 |
RECONF |
2014-06-12 14:35 |
Miyagi |
Katahira Sakura Hall |
A Memory Profiling Framework for Stencil Computation on an FPGA Accelerator with High Level Synthesis Koji Okina, Rie Soejima, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2014-11 |
[more] |
RECONF2014-11 pp.55-60 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-28 09:20 |
Kagoshima |
|
A trade-off between hardware resources and detection accuracy for FPGA implementation of separability filters Jimpei Hamamura, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2013-48 |
We propose three methods to reduce hardware resources required for FPGA implementation of separability filters and evalu... [more] |
RECONF2013-48 pp.51-56 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-28 13:45 |
Kagoshima |
|
Implementation of a fast runtime visualization of a GPU-based electromagnetic simulation using a 3D-FDTD method Kota Aoki, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri, Takafumi Fujimoto (Nagasaki Univ.) CPSY2013-65 |
In this paper, we present implementation and evaluation of a fast runtime visualization of a GPU-based electromagnetic s... [more] |
CPSY2013-65 pp.35-40 |
RECONF |
2013-09-18 16:20 |
Ishikawa |
Japan Advanced Institute of Science and Technology |
A Power-Performance model for 3-D stencil computation on an FPGA accelerator Keisuke Dohi, Kota Fukumoto, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2013-23 |
This paper presents user space parameters and characteristics modeling of 3-D stencil computing on a stream-oriented FPG... [more] |
RECONF2013-23 pp.19-24 |
RECONF |
2013-05-21 11:00 |
Kochi |
Kochi Prefectural Culture Hall |
Performance model evaluation for 3-D stencil computation using a high-level synthesis tool Keisuke Dohi, Yoshihiro Nakamura, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2013-12 |
In this paper, we evaluate a performance model for heat spreading simulation on a MaxCompiler, a kind of high-
-level s... [more] |
RECONF2013-12 pp.61-66 |
RECONF |
2013-05-21 13:20 |
Kochi |
Kochi Prefectural Culture Hall |
Video based real-time feature extraction and abnormal action detection on an FPGA Kaoru Hamasaki, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ) RECONF2013-14 |
[more] |
RECONF2013-14 pp.73-78 |
CPSY, VLD, RECONF, IPSJ-SLDM [detail] |
2013-01-17 14:25 |
Kanagawa |
|
Implementation of a pupil detection method using an FPGA accelerator and a high-level synthesis tool Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) VLD2012-132 CPSY2012-81 RECONF2012-86 |
In this paper, we describe an implementation of a pupil detection using MaxCompiler which is a high-level synthesis fram... [more] |
VLD2012-132 CPSY2012-81 RECONF2012-86 pp.147-152 |
CPSY, VLD, RECONF, IPSJ-SLDM [detail] |
2013-01-17 14:50 |
Kanagawa |
|
Implementation of 3-D stencil computation with an FPGA accelerator and a high level synthesis tool Yoshihiro Nakamura, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) VLD2012-133 CPSY2012-82 RECONF2012-87 |
In this paper, we implemented a stencil computation kernel on an FPGA accelerator using MaxCompiler and MaxGenFD tools, ... [more] |
VLD2012-133 CPSY2012-82 RECONF2012-87 pp.153-158 |
RECONF |
2012-09-18 16:30 |
Shiga |
Epock Ritsumei 21, Ritsumeikan Univ. |
Study of "fine-grain dynamic partial reconfiguration mechanism" on FPGA Kunihiro Ueda, Naoki Kawamoto, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2012-34 |
Dynamic and partial reconfiguration (DRP) on SRAM-based FPGAs has received increasing attention, since Xilinx Inc. start... [more] |
RECONF2012-34 pp.61-66 |
RECONF |
2012-09-19 09:00 |
Shiga |
Epock Ritsumei 21, Ritsumeikan Univ. |
Effects of Power Saving by Dynamic Partial Reconfiguration in Video Shape Detection Processing Naoki Kawamoto, Kunihiro Ueda, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2012-36 |
Some of recent FPGAs have the functionality of dynamic partial reconfiguration. By using this functionality, it is expec... [more] |
RECONF2012-36 pp.73-78 |
RECONF |
2012-05-29 09:50 |
Okinawa |
Tiruru (Naha Okinawa, Japan) |
FPGA implementation of a video-based real-time pupil detection method Yuma Hatanaka, Keisuke Dohi, Kazuhiro Negi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki City Univ) RECONF2012-3 |
[more] |
RECONF2012-3 pp.13-18 |
RECONF |
2012-05-29 17:10 |
Okinawa |
Tiruru (Naha Okinawa, Japan) |
Implementation of delay control methods for FPGA-based digital DC-DC Converters Yoshihiko Yamabe, Kanako Nakashima, Keisuke Dohi, Kazuma Hamawaki, Kentaro Yamashita, Kazuhiro Kajiwara, Fujio Kurokawa, Yuichiro Shibata, Kiyoshi Oguri (Univ.) RECONF2012-15 |
(To be available after the conference date) [more] |
RECONF2012-15 pp.83-88 |
EST |
2011-10-07 14:55 |
Nagasaki |
Nagasaki Prefectural Art Museum |
Evaluation of GPU implementation of absorbing boundary conditions on the 3-D FDTD method Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri, Takafumi Fujimoto (Nagasaki Univ.) EST2011-79 |
This paper shows evaluation of GPU implementation Perfectly Matched Layer (PML) absorbing boundary condition for a 3-D F... [more] |
EST2011-79 pp.79-84 |
RECONF |
2011-05-12 10:45 |
Hokkaido |
Hokkaido Univ. (Faculty of Eng., B3 Bldg.) |
Pattern Compression of FAST Corner Detection and its FPGA Implementation Keisuke Dohi, Yuji Yorita, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2011-2 |
[more] |
RECONF2011-2 pp.7-12 |
RECONF, VLD, CPSY, IPSJ-SLDM [detail] |
2011-01-17 11:45 |
Kanagawa |
Keio Univ (Hiyoshi Campus) |
Highly efficient mapping of electromagnetic wave interactions using the FDTD method for antenna designing on a CUDA-compatible GPU Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri, Takafumi Fujimoto (Nagasaki Univ.) VLD2010-88 CPSY2010-43 RECONF2010-57 |
This paper describes electromagnetical field simulation using the 3D-FDTD method for antenna designing on a
CUDA-compat... [more] |
VLD2010-88 CPSY2010-43 RECONF2010-57 pp.25-30 |
RECONF, VLD, CPSY, IPSJ-SLDM [detail] |
2011-01-18 09:40 |
Kanagawa |
Keio Univ (Hiyoshi Campus) |
FPGA implementation of human detectin with HOG features and AdaBoost Kazuhiro Negi, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) VLD2010-100 CPSY2010-55 RECONF2010-69 |
An increase in in-home accidental deaths of elderly person caused by
falling and fainting, which are nonfatal if detect... [more] |
VLD2010-100 CPSY2010-55 RECONF2010-69 pp.117-122 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 14:15 |
Fukuoka |
Kyushu University |
A discussion on calculating eigenvalues of real symmetric tridiagonal matrices on a GPU Kohei Matsunobu, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ) CPSY2010-35 |
While GPUs are attracting attention as an accelerator in wide-ranged application areas, compatibility between the archit... [more] |
CPSY2010-35 pp.19-24 |