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Committee Date Time Place Paper Title / Authors Abstract Paper #
SS 2010-08-05
14:15
Hokkaido Asahikawa Shimin-Bunka-Kaikan (Civic Culture Hall) Quality Assurance by Using SPIN Model Checker in Mobile FeliCa IC Chip Development
Kenji Tadano, Taro Kurita (FeliCa Networks) SS2010-21
We applied SPIN model checker to C source code as a quality assurance method for Mobile FeliCa IC chip firmware. In this... [more] SS2010-21
pp.29-34
CAS, MSS, VLD, SIP 2010-06-22
12:55
Hokkaido Kitami Institute of Technology Semi-automated Modeling of Interrupt Behavior Control with Promela
Kenji Tadano (FeliCa Networks), Yoshinao Isobe (AIST) CAS2010-24 VLD2010-34 SIP2010-45 CST2010-24
Reverse engineering using model checking techniques is effective as a method to improve embedded software quality. Howev... [more] CAS2010-24 VLD2010-34 SIP2010-45 CST2010-24
pp.133-138
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