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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 69  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
RECONF 2019-05-10
15:05
Tokyo Tokyo Tech Front RECONF2019-17 (To be available after the conference date) [more] RECONF2019-17
pp.91-96
RECONF 2018-05-24
10:30
Tokyo GATE CITY OHSAKI RECONF2018-1 (To be available after the conference date) [more] RECONF2018-1
pp.1-6
RECONF 2017-09-26
13:30
Tokyo DWANGO Co., Ltd. RECONF2017-34  [more] RECONF2017-34
pp.69-74
RECONF, CPSY, DC, IPSJ-ARC
(Joint) [detail]
2017-05-22
16:00
Hokkaido Noboribetsu-Onsen Dai-ichi-Takimoto-Kan RECONF2017-5 (To be available after the conference date) [more] RECONF2017-5
pp.19-24
RECONF, CPSY, DC, IPSJ-ARC
(Joint) [detail]
2017-05-23
09:00
Hokkaido Noboribetsu-Onsen Dai-ichi-Takimoto-Kan RECONF2017-11  [more] RECONF2017-11
pp.51-56
RECONF, CPSY, DC, IPSJ-ARC
(Joint) [detail]
2017-05-23
09:40
Hokkaido Noboribetsu-Onsen Dai-ichi-Takimoto-Kan RECONF2017-13 (To be available after the conference date) [more] RECONF2017-13
pp.63-68
RECONF 2016-09-05
13:35
Toyama Univ. of Toyama RECONF2016-25 (To be available after the conference date) [more] RECONF2016-25
pp.7-12
RECONF 2016-05-19
13:00
Kanagawa FUJITSU LAB. FPGA Implementation of a Super-Resolution System
Taito Manabe, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2016-5
In this study, we implement a real-time super-resolution system for moving images using a convolutional neural network o... [more] RECONF2016-5
pp.17-22
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-20
14:15
Kanagawa Hiyoshi Campus, Keio University Design of Stencil Computation based on Building-Cube Method on an FPGA Accelerator with High Level Synthesis
Rie Soejima, Koji Okina, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) VLD2015-91 CPSY2015-123 RECONF2015-73
In building-cube method (BCM), which is one of the adaptive mesh refinement, the computational region is divided into a ... [more] VLD2015-91 CPSY2015-123 RECONF2015-73
pp.125-130
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-21
09:25
Kanagawa Hiyoshi Campus, Keio University Discussion on FPGA implementation of real-time human detection using FIND features
Yoshiki Hayashida, Masahito Oishi, Ryo Fujita, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) VLD2015-99 CPSY2015-131 RECONF2015-81
In this paper, we discuss FPGA implementation of image-based human
detection using the feature interaction descriptor ... [more]
VLD2015-99 CPSY2015-131 RECONF2015-81
pp.173-178
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-21
09:50
Kanagawa Hiyoshi Campus, Keio University FPGA Implementation of a Peak Detection System using AMPD Algorithm
Fumihiko Iwasaki, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ) VLD2015-100 CPSY2015-132 RECONF2015-82
Peak detection of time-series data is widely used in various
applications. A demand for implementation of low-latency... [more]
VLD2015-100 CPSY2015-132 RECONF2015-82
pp.179-184
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2015-12-03
10:10
Nagasaki Nagasaki Kinro Fukushi Kaikan High-level synthesis of an image-based human detection FPGA system with a machine learning technique
Ryo Fujita, Masahito Oishi, Yoshiki Hayashida, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2015-58
In this paper, we discuss an FPGA implementation of image-based human detection system using histograms of oriented grad... [more] RECONF2015-58
pp.57-62
RECONF 2015-09-18
09:50
Ehime Ehime University Comparison of machine learning classifiers for HOG-based human detection on an FPGA
Masahito Oishi, Yoshiki Hayashida, Ryo Fujita, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2015-34
In this paper, we compare Real AdaBoost and a linear SVM from a view point of FPGA implementation of an image-based huma... [more] RECONF2015-34
pp.13-18
RECONF, CPSY, VLD, IPSJ-SLDM [detail] 2015-01-29
16:05
Kanagawa Hiyoshi Campus, Keio University FPGA Implementation of a High Time Resolution Signal Generation Circuit for PWM
Shun Kashiwagi, Daiki Mitsutake, Hironobu Taniguchi, Yuichiro Shibata, Kiyoshi Oguri, Hidenori Maruta, Fujio Kurokawa (Nagasaki Univ.) VLD2014-125 CPSY2014-134 RECONF2014-58
Recently, high-frequency digitally controlled switching power supplies
have received increasing attention in the conte... [more]
VLD2014-125 CPSY2014-134 RECONF2014-58
pp.85-90
RECONF, CPSY, VLD, IPSJ-SLDM [detail] 2015-01-30
08:30
Kanagawa Hiyoshi Campus, Keio University Discussion on power performance optimization for stream processing on an FPGA accelerator
Kota Fukumoto, Koji Okina, Rie Soejima, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) VLD2014-131 CPSY2014-140 RECONF2014-64
 [more] VLD2014-131 CPSY2014-140 RECONF2014-64
pp.123-128
RECONF, CPSY, VLD, IPSJ-SLDM [detail] 2015-01-30
08:50
Kanagawa Hiyoshi Campus, Keio University A proposal of a stream image compression architecture using neural networks
Kaoru Hamasaki, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) VLD2014-132 CPSY2014-141 RECONF2014-65
Real-time image processing systems based on an application-specific
streamed processing architecture configured on an ... [more]
VLD2014-132 CPSY2014-141 RECONF2014-65
pp.129-132
PRMU 2014-12-12
14:45
Fukuoka   Performance Comparison of GPU Implementation, HIPR and BK for Streo Vision for Graph Cut
Kenji Maruo, Kiyoshi Oguri, Yuichiro Shibata (Nagasaki Univ) PRMU2014-83
Recently the graph cut is a widely used technique in the field of the vision.However,a graph cut takes much time if size... [more] PRMU2014-83
pp.103-109
PRMU 2014-12-12
15:15
Fukuoka   A study on the placement of GPU graph cut graph data for stereovision Guide to the Technical Report and Template
Ko Tamura, Kiyoshi Oguri, Yuichiro Shibata (Nagasaki Univ.) PRMU2014-84
We have implemented the Push Relabel graph cut algorithm on GPU(Graphics Processing Unit) to accomplish
a real time st... [more]
PRMU2014-84
pp.111-116
PRMU 2014-12-12
15:45
Fukuoka   A study on speedup of the graph cut PushRelabel processing using GPU Dynamic Parallelism
Rei Kasedo, Kiyoshi Oguri, Yuichiro Shibata (Nagasaki Univ) PRMU2014-85
We have implemented a PushRelabel algorithm using a NVIDIA and CUDA.
In late years the CUDA which is a GPU developping... [more]
PRMU2014-85
pp.117-121
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2014-11-26
11:35
Oita B-ConPlaza Efficient FPGA resource allocation for HOG-based human detection
Masahito Oishi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2014-39
In this paper, we discuss implementation for highly efficient and compact FPGA implementation of an image-based
real-ti... [more]
RECONF2014-39
pp.31-36
 Results 1 - 20 of 69  /  [Next]  
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