| IEICE Technical Committee Submission System Conference Schedule |
Online Proceedings [Sign in] Tech. Rep. Archives |
All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| COMP | 2025-03-07 16:00 |
Tokyo | Ochanomizu University (Tokyo) | Logarithmic Random Bidding for Roulette Wheel Selection in Parallel with Precise Probabilities Koji Nakano (Hiroshima U.) |
[more] | |
| IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] | 2020-01-23 16:55 |
Kanagawa | Raiosha, Hiyoshi Campus, Keio University (Kanagawa) |  VLD2019-79 CPSY2019-77 RECONF2019-69 |
This talk reviews research on parallel processing and hardware algorithms for FPGAs that the speaker have been done so f... [more] | VLD2019-79 CPSY2019-77 RECONF2019-69 p.157 |
| CPSY, DC, IPSJ-ARC [detail] | 2019-07-25 15:05 |
Hokkaido | Kitami Civic Hall (Hokkaido) | Five-year achievement of the Graph Golf competition Ikki Fujiwara (NII), Koji Nakano (Hiroshima U.), Michihiro Koibuchi (NII) CPSY2019-27 DC2019-27 |
(To be available after the conference date) [more] | CPSY2019-27 DC2019-27 pp.137-145 |
| OME | 2018-02-22 15:25 |
Tokyo | Tokyo University of Agriculture and Technology (Tokyo) | [Invited Talk]
Design, Synthesis, and Chiroptical Properties of Chiral π-Conjugated Compounds Koji Nakano (TUAT) OME2017-61 |
[more] | OME2017-61 pp.17-20 |
| CPSY | 2017-11-19 15:00 |
Aomori | Aomori Tourist Information Center, ASPAM (Aomori) | [Poster Presentation]
GPU Applications with Single Kernel Synchronization Technique Shunji Funasaka, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) CPSY2017-56 |
A task array is a 2-dimensional array of tasks with dependency relations. Conventional CUDA implementations repeatedly ... [more] |
CPSY2017-56 pp.33-38 |
| CPSY | 2017-11-19 15:00 |
Aomori | Aomori Tourist Information Center, ASPAM (Aomori) | [Poster Presentation]
A GPU Implementation of Image Generation for Square Pointillism Hiroki Tokura, Yuki Kuroda, Yasuaki Ito, Koji Nakano (Hiroshima Univ.) CPSY2017-57 |
[more] | CPSY2017-57 pp.39-44 |
| CPSY | 2017-11-19 15:00 |
Aomori | Aomori Tourist Information Center, ASPAM (Aomori) | [Poster Presentation]
Hybrid Architecture for the Approximate String Matching, and its FPGA Implementation Takuma Wada, Shunji Funasaka, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) CPSY2017-58 |
[more] | CPSY2017-58 pp.45-50 |
| CPSY, DC, IPSJ-ARC (Joint) [detail] |
2017-07-26 10:45 |
Akita | Akita Atorion-Building (Akita) (Akita) | A GPU Implementation of Computing the Voronoi Map and the Euclidean Distance Map Hiroaki Honda, Takumi Honda, Shinnosuke Yamamoto, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) CPSY2017-18 |
The main contribution of this paper is to present simple and fast parallel algorithms for computing complete/connected V... [more] | CPSY2017-18 pp.13-18 |
| CPSY, DC, IPSJ-ARC (Joint) [detail] |
2017-07-26 11:15 |
Akita | Akita Atorion-Building (Akita) (Akita) | An Efficient GPU Implementation of Computing the Summed Area Table Yutaro Emoto, Takumi Honda, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) CPSY2017-19 |
The main contribution of this paper is to show an efficient GPU implementation of computing the summed area table. Exist... [more] | CPSY2017-19 pp.19-24 |
| COMP, IPSJ-AL | 2017-05-12 15:20 |
Nagasaki | (Nagasaki) | Bulk Execution of the Dynamic Programming for the Optimal Polygon Triangulation on the GPU Kohei Yamashita, Yasuaki Ito, Koji Nakano (Hiroshima Univ.) COMP2017-3 |
[more] | COMP2017-3 pp.17-22 |
| COMP, IPSJ-AL | 2017-05-12 15:50 |
Nagasaki | (Nagasaki) | A GPU Implementation of the Smith-Waterman Algorithm using Bitwise Parallel Bulk Computation Technique Takahiro Nishimura (Hiroshima Univ.), Jacir L. Bordim (UnB), Yasuaki Ito, Koji Nakano (Hiroshima Univ.) COMP2017-4 |
[more] | COMP2017-4 pp.23-30 |
| COMP, ISEC | 2016-12-21 15:30 |
Hiroshima | Hiroshima University (Hiroshima) | Theoretical Model of Interconnection Networks Consisting of Hosts and Switches Ryota Yasudo (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano (Keio Univ.), Koji Nakano (Hiroshima Univ.) ISEC2016-79 COMP2016-40 |
Designing interconnection networks with low average shortest path length (ASPL) is an important object for researchers o... [more] | ISEC2016-79 COMP2016-40 pp.51-58 |
| CPSY, IPSJ-ARC | 2016-10-06 10:00 |
Chiba | Makuhari-messe (Chiba) | [Poster Presentation]
A GPU Implementation of Eigenvalue Computation for a Large Number of Matrices Hiroki Tokura, Takumi Honda, Yasuaki Ito, Koji Nakano, Mitsuya Nishino, Yushiro Hirota, Masami Saeki (Hiroshima Univ.) CPSY2016-45 |
The computation of eigenvalues of a matrix has a lot of applications in the field of science and engineering such as ima... [more] | CPSY2016-45 pp.13-18 |
| CPSY, IPSJ-ARC | 2016-10-06 10:00 |
Chiba | Makuhari-messe (Chiba) | [Poster Presentation]
A Loss-Less Data Compression Algorithm for GPUs Shunji Funasaka, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) CPSY2016-46 |
There is no doubt that data compression is very important in computer engineering. However, most lossless data compressi... [more] | CPSY2016-46 pp.19-24 |
| CPSY, DC, IPSJ-ARC (Joint) [detail] |
2016-08-08 10:00 |
Nagano | Kissei-Bunka-Hall (Matsumoto) (Nagano) | An FPGA Implementation of LZW Compression Xin Zhou, Yasuaki Ito, Koji Nakano (Hiroshima Univ.) CPSY2016-11 |
[more] | CPSY2016-11 pp.7-12 |
| CPSY, DC, IPSJ-ARC (Joint) [detail] |
2016-08-08 10:30 |
Nagano | Kissei-Bunka-Hall (Matsumoto) (Nagano) | A GPU Implementation of the CKY Parsing using Bitwise Parallel Bulk Computation Toru Fujita, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) CPSY2016-12 |
[more] | CPSY2016-12 pp.13-18 |
| CPSY, DC, IPSJ-ARC (Joint) [detail] |
2016-08-10 16:45 |
Nagano | Kissei-Bunka-Hall (Matsumoto) (Nagano) | Fast Simulation of Conway's Game of Life using the FPGA Yuma Hamada, Xin Zhou, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) CPSY2016-37 |
[more] | CPSY2016-37 pp.269-274 |
| CPSY, DC, IPSJ-ARC (Joint) [detail] |
2016-08-10 17:30 |
Nagano | Kissei-Bunka-Hall (Matsumoto) (Nagano) | Random Grid Graph for Low-Latency Networks Koji Nakano, Daisuke Takafuji, Satoshi Fujita (Hiroshima Univ.), Hiroki Matsutani (Keio Univ.), Ikki Fujiwara, Michihiro Koibuchi (NII) CPSY2016-38 |
[more] | CPSY2016-38 pp.275-280 |
| ICD, MW | 2016-03-02 14:05 |
Hiroshima | Hiroshima University (Hiroshima) | An Implementation of Hardware Sorting Algorithms using the FPGA Naoyuki Matsumoto, Xin Zhou, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) MW2015-180 ICD2015-103 |
The main contribution of this paper is to design $K$-sorter which sorts $K$ keys given from the input port one by one in... [more] | MW2015-180 ICD2015-103 pp.37-42 |
| ICD, MW | 2016-03-02 14:30 |
Hiroshima | Hiroshima University (Hiroshima) | An Efficient Implementation of LZW Decompression on the FPGA Xin Zhou, Yasuaki Ito, Koji Nakano (Hiroshima Univ.) MW2015-181 ICD2015-104 |
LZW algorithm is one of the most famous dictionary-based compression and decompression algorithms. The main contribution... [more] | MW2015-181 ICD2015-104 pp.43-48 |
[Return to Top Page]