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Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD, SDM 2014-08-04
11:15
Hokkaido Hokkaido Univ., Multimedia Education Bldg. Testability Improvement for 12.8 GB/s Wide IO DRAM Controller with Small Area Prebonding TSV test and 1GHz Sampled Fully Digital Noise Monitor
Takao Nomura, Ryo Mori, Koji Takayanagi, Toshihiko Ochiai, Kazuki Fukuoka, Tsuyoshi Kida, Koji Nii, Sadayuki Morita (REL) SDM2014-65 ICD2014-34
We developed a Wide IO DRAM controller chip with Through Silicon Via (TSV) technology. Test circuitry is embedded in the... [more] SDM2014-65 ICD2014-34
pp.17-21
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