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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 4 of 4  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
SCE 2019-01-23
13:30
Tokyo   Development of 30-GHz Datapath for Bit-Parallel, Gate-Level-Pipelined Rapid Single-Flux-Quantum Microprocessors
Ikki Nagaoka (Nagoya Univ), Yuki Hatanaka (Mitsubishi Elec), Yuichi Matsui (Nagoya Univ), Koki Ishida (Kyushu Univ), Masamitsu Tanaka, Kyosuke Sano, Taro Yamashita (Nagoya Univ), Takatsugu Ono, Koji Inoue (Kyushu Univ), Akira Fujimaki (Nagoya Univ) SCE2018-30
We have started development of high-throughput single-flux-quantum (SFQ) microprocessors with the aim of higher throughp... [more] SCE2018-30
pp.29-34
SCE 2017-08-09
14:35
Aichi Nagoya Univ. (Higashiyama Campus) Design of Component Circuits for Rapid Single-Flux-Quantum Gate-Level-Pipelined Microprocessors
Yuki Hatanaka, Yuichi Matsui, Masamitsu Tanaka, Kyosuke Sano, Akira Fujimaki (Nagoya Univ.), Koki Ishida, Takatsugu Ono, Koji Inoue (Kyushu Univ.) SCE2017-17
We have started development of high-throughput rapid single-flux-quantum (RSFQ) microprocessors with the aim of higher p... [more] SCE2017-17
pp.37-42
VLD, DC, CPSY, RECONF, CPM, ICD, IE
(Joint) [detail]
2016-11-30
11:20
Osaka Ritsumeikan University, Osaka Ibaraki Campus Shift-Register-Based Single-Flux-Quantum Cache Memory Architecture
Koki Ishida (Kyushu Univ.), Masamitsu Tanaka (Nagoya Univ.), Takatsugu Ono, Koji Inoue (Kyushu Univ.) CPM2016-84 ICD2016-45 IE2016-79
 [more] CPM2016-84 ICD2016-45 IE2016-79
pp.39-44
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2015-12-03
11:15
Nagasaki Nagasaki Kinro Fukushi Kaikan Logic Design of A Single-Flux-Quantum Microprocessor
Koki Ishida, Tomonori Tsuhata (Kyushu Univ.), Masamitsu Tanaka (Nagoya Univ.), Takatsugu Ono, Koji Inoue (Kyushu Univ.) CPSY2015-73
CMOS microprocessors have been facing a limitation for clock speed improvement because of increasing
computing power. U... [more]
CPSY2015-73
pp.69-74
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