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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2009-12-04 10:20 |
Kochi |
Kochi City Culture-Plaza |
A Study of two input LUT array type programmable logic architecture for cryptographic processing Ai Nakanishi, Kouta Ishibashi, Yuuichirou Kurokawa, Takeshi Fujino (Ritsumeikan Univ.) RECONF2009-49 |
Various kinds of block ciphers must be supported in order to communicate safely in computer networks by using the consum... [more] |
RECONF2009-49 pp.49-54 |
ICD |
2008-12-12 14:10 |
Tokyo |
Tokyo Inst. Tech., Ohokayama Campus, Kokusa-Kouryu-Kaikan |
The Development of CAD Design Tools for Via Programmable Logic Device VPEX Yuuichi Kokushou, Masahide Kawarasaki, Kouta Ishibashi, Tomohiro Nishimoto, Kazuma Kitamura (Ritsumeikan Univ), Masaya Yoshikawa (Meijyou Univ), Takeshi Fujino (Ritsumeikan Univ) ICD2008-123 |
We have been studied the user-programmable device called VPEX(Via Programmable logic using Exclusive or array) which can... [more] |
ICD2008-123 pp.107-112 |
VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2007-11-20 15:10 |
Fukuoka |
Kitakyushu International Conference Center |
A Development of the Auto mapping tool for embedded Programmable Logic matriX (ePLX) and the study of ePLX local architecture Kouta Ishibashi, Yoshiyuki Tanaka, Mitsutaka Matsumoto (Ritsumeikan Univ.), Hirofumi Nakano, Takenobu Iwao, Yoshihiro Okuno, Kazutami Arimoto (Renesas Technology), Masaya Yoshikawa (Meijo Univ.), Tomonori Izumi, Takeshi Fujino (Ritsumeikan Univ.) RECONF2007-32 |
We propose a ePLX(embedded Programmable Logic matriX)which will be embedded in SoC.The ePLX consists of small area and a... [more] |
RECONF2007-32 pp.1-6 |
VLD, CPSY, RECONF, IPSJ-SLDM |
2007-01-18 13:25 |
Tokyo |
Keio Univ. Hiyoshi Campus |
Analysis of design architecture of ePLX ( embedded Programmable Logic matriX) and Evaluation of circuit mapping Tomoo Hishida, Kouta Ishibashi, Shun Kimura, Naoki Okuno, Mitsutaka Matsumoto (Ritsumeikan Univ.), Hirofumi Nakano, Takenobu Iwao, Yoshihiro Okuno, Kazutami Arimoto (Renesas Technology), Tomonori Izumi, Takeshi Fujino (Ritsumeikan Univ.) |
Recently, non-recurring engineering costs (NREs), including cost of mask-sets, and engineering design efforts are critic... [more] |
VLD2006-100 CPSY2006-71 RECONF2006-71 pp.37-42 |
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