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Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM 2010-02-05
13:30
Tokyo Kikai-Shinko-Kaikan Bldg. Optimization of Metallization Processes for 32-nm node Highly Reliable Ultralow-k (k=2.4)/Cu Multilevel Interconnects Incorporating a Bilayer Low-k Barrier Cap (k=3.9)
M. Iguchi, S. Yokogawa, Hirokazu Aizawa, Y. Kakuhara, Hideaki Tsuchiya, Norio Okada, Kiyotaka Imai, M. Tohara, K. Fujii (NEC Electronics), T. Watanabe (Toshiba) SDM2009-186
Reliability of 32-nm-node ultralow-k (k=2.4)/Cu multilevel interconnects incorporating a bilayer low-k barrier cap (k=3.... [more] SDM2009-186
pp.25-29
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