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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, IPSJ-SLDM | 2010-05-20 10:00 |
Fukuoka | Kitakyushu International Conference Center | 3D System Integration of Processor and Multi-Stacked SRAMs Using Inductive-Coupling Link Makoto Saen, Kenichi Osada, Yasuyuki Okuma (Hitachi), Yasuhisa Shimazaki (Keio Univ./Renesas Technology), Itaru Nonomura (Renesas Technology), Kiichi Niitsu, Yasufumi Sugimori, Yoshinori Kohama, Kazutaka Kasuga, Tadahiro Kuroda (Keio Univ.)  VLD2010-5 |
This paper describes a three-dimensional (3D) system integration of a fully functional processor chip and two memory chi... [more] | VLD2010-5 pp.43-47 |
| VLD, IPSJ-SLDM | 2010-05-20 13:05 |
Fukuoka | Kitakyushu International Conference Center | A Wide-Range Clock Synchronizer with Predictive-Delay-Adjustment Scheme for Continuous Voltage Scaling in DVFS Control Masafumi Onouchi, Yusuke Kanno, Makoto Saen, Shigenobu Komatsu (Hitachi), Yoshihiko Yasu, Koichiro Ishibashi (Renesas) VLD2010-7 |
A ``wide-range voltage-and-frequency clock synchronizer'' for maintaining synchronization during voltage-scaling transit... [more] | VLD2010-7 pp.67-72 |
| ICD | 2009-12-15 17:00 |
Shizuoka | Shizuoka University (Hamamatsu) | A 3D Processor Using Inductive-Coupling Inter-Chip Link
-- 3D System Integration of a 90nm CMOS Processor and a 65nm CMOS SRAM -- Kiichi Niitsu (Keio Univ./JST), Yasuhisa Shimazaki (Keio Univ./Renesas Technology), Yasufumi Sugimori, Yoshinori Kohama, Kazutaka Kasuga (Keio Univ.), Itaru Nonomura (Renesas Technology), Makoto Saen, Shigenobu Komatsu, Kenichi Osada, Naohiko Irie (Hitachi), Toshihiro Hattori, Atsushi Hasegawa (Renesas Technology), Tadahiro Kuroda (Keio Univ.) ICD2009-105 |
A 90nm CMOS processor is mounted face down on a package by C4 bump and a 65nm CMOS 1MB SRAM is glued on it face up. The ... [more] | ICD2009-105 pp.163-168 |
| ICD, IPSJ-ARC | 2008-05-14 10:00 |
Tokyo | Multicore Debug Function for Embedded Processor Jun Sakiyama, Makoto Saen (Hitachi, Ltd.), Takehiro Shimizu (Renesas Technology Corp.) |
[more] | ||
| ICD | 2008-04-17 15:20 |
Tokyo | [Panel Discussion]
Probing into the Potential of the Future Flash
-- An Impact of Flash Revolution -- Kazuhiko Kajigaya (Elpida), Naoharu Shinozaki (Spansion), Toshio Kakihara (HGST), Kazushige Kanda (Toshiba), Michio Kobayashi (Spansion), Makoto Saen (Hitachi), Tadahiko Sugibayashi (NEC), Ken Takeuchi (Tokyo Univ.), Hisao Tsukazawa (Toshiba) ICD2008-7 |
Flash-memory is now the driving force for the semiconductor process technology and trying to expand its new market with ... [more] | ICD2008-7 pp.37-38 |
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| IE, SIP, ICD, IPSJ-SLDM | 2004-10-22 13:00 |
Yamagata | SoC debug architecture and applications Tomoyuki Kodama, Makoto Saen (Hitachi), Junichi Nishimoto (Renesas), Fumio Arakawa (Hitachi) |
Debugging tools analyzing CPU core mainly are inadequacy for latest SoC, which have many IPs. Especially debugging tools... [more] | SIP2004-95 ICD2004-127 IE2004-71 pp.37-42 |
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