Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
EMM, BioX, ISEC, SITE, ICSS, HWS, IPSJ-CSEC, IPSJ-SPT [detail] |
2024-07-22 13:00 |
Hokkaido |
Sapporo Convention Center (Hokkaido) |
Shor algorithm experiments with multi-node decision diagram-based quantum simulator Yusuke Kimura (Fujitsu), Li Shaowen (U-Tokyo), Hiromitsu Soneda, Junpei Koyama (Fujitsu), Hiroyuki Sato, Masahiro Fujita (U-Tokyo) ISEC2024-8 SITE2024-5 BioX2024-18 HWS2024-8 ICSS2024-12 EMM2024-14 |
Prime factorization with the Shor algorithm is one of the major applications of quantum computers.
The research to impr... [more] |
ISEC2024-8 SITE2024-5 BioX2024-18 HWS2024-8 ICSS2024-12 EMM2024-14 pp.1-7 |
VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] |
2022-11-30 16:15 |
Kumamoto |
(Kumamoto, Online) (Primary: On-site, Secondary: Online) |
FPGA Implementation of Learned Image Compression Heming Sun (Waseda U), Qingyang Yi (UTokyo), Jiro Katto (Waseda U), Masahiro Fujita (UTokyo) VLD2022-53 ICD2022-70 DC2022-69 RECONF2022-76 |
Learned image compression (LIC) has reached a superior coding gain than traditional hand-crafted standards such as JPEG ... [more] |
VLD2022-53 ICD2022-70 DC2022-69 RECONF2022-76 pp.194-199 |
HWS, VLD [detail] |
2021-03-03 10:25 |
Online |
Online (Online) |
Evaluation on Approximate Multiplier for CNN Calculation Yuechuan Zhang, Masahiro Fujita, Takashi Matsumoto (UTokyo) VLD2020-68 HWS2020-43 |
Improving the accuracy of a convolutional neural network (CNN) typically requires larger hardware with more energy consu... [more] |
VLD2020-68 HWS2020-43 pp.7-12 |
HWS, VLD [detail] |
2021-03-03 13:00 |
Online |
Online (Online) |
[Memorial Lecture]
Scheduling Sparse Matrix-Vector Multiplication onto Parallel Communication Architecture Mingfei Yu, Ruitao Gao, Masahiro Fujita (Univ. Tokyo) VLD2020-71 HWS2020-46 |
There is an obvious trend to make use of hardware including many-core CPU, GPU and FPGA, to conduct computationally inte... [more] |
VLD2020-71 HWS2020-46 pp.24-29 |
VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2020-11-17 09:55 |
Online |
Online (Online) |
Efficient computation of inductive invariant through flipflop selection Fudong Wang, Masahiro Fujita (U-Tokyo) VLD2020-20 ICD2020-40 DC2020-40 RECONF2020-39 |
As we all know, verification plays more and more important role in VLSI design and manufacture. However, it always takes... [more] |
VLD2020-20 ICD2020-40 DC2020-40 RECONF2020-39 pp.54-59 |
BioX, CNR |
2020-03-04 17:35 |
Tokyo |
(Tokyo) (Cancelled but technical report was issued) |
A Study of Liveness Detection Method using Perspiration Ryosuke Okudera, Yumo Ouchi, Yuya Shiomi, Ayaka Sugimoto, Genki Sugimoto, Masahiro Fujita, Yuto Mano, Tetsushi Ohki, Masakatsu Nishigaki (Shizuoka Univ.) BioX2019-67 CNR2019-50 |
[more] |
BioX2019-67 CNR2019-50 pp.31-34 |
HWS, VLD [detail] |
2020-03-04 10:55 |
Okinawa |
Okinawa Ken Seinen Kaikan (Okinawa) (Cancelled but technical report was issued) |
An Automatic Method to Generalize Matrix-Vector Multiplication with Multiple Processors Considering the Efficiency of the Communications Akihiro Goda, Masahiro Fujita (UT) VLD2019-97 HWS2019-70 |
[more] |
VLD2019-97 HWS2019-70 pp.19-24 |
IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] |
2020-01-24 14:20 |
Kanagawa |
Raiosha, Hiyoshi Campus, Keio University (Kanagawa) |
An Approach to Approximate Multiplier Optimization Xinpei Zhang, Amir Masoud Gharehbaghi, Masahiro Fujita (Univ. Tokyo) VLD2019-88 CPSY2019-86 RECONF2019-78 |
[more] |
VLD2019-88 CPSY2019-86 RECONF2019-78 pp.205-210 |
IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] |
2020-01-24 14:45 |
Kanagawa |
Raiosha, Hiyoshi Campus, Keio University (Kanagawa) |
Partial synthesis method based on Column-wise verification for integer multipliers Jian Gu, Amir Masoud Gharehbaghi, Masahiro Fujita (UTokyo) VLD2019-89 CPSY2019-87 RECONF2019-79 |
Partial logic synthesis is a method that most parts of the target circuits are fixed and the missing portions can be log... [more] |
VLD2019-89 CPSY2019-87 RECONF2019-79 pp.211-216 |
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2019-11-13 11:20 |
Ehime |
Ehime Prefecture Gender Equality Center (Ehime) |
A New ATPG-based Logic Optimization Method by Removing the Redundant Multiple Faults Peikun Wang, Amir Masaud Gharehbaghi, Masahiro Fujita (The Univ. of Tokyo) VLD2019-32 DC2019-56 |
In this paper, we propose a new ATPG-based logic optimization method by removing the redundant multiple faults. In order... [more] |
VLD2019-32 DC2019-56 pp.19-22 |
VLD, IPSJ-SLDM |
2019-05-15 15:25 |
Tokyo |
Ookayama Campus, Tokyo Institute of Technology (Tokyo) |
SRAM-Based Synthesis for Multi-Output Gates Xingming Le, Amir Masoud Gharehbaghi, Masahiro Fujita (The Univ. of Tokyo) VLD2019-4 |
Conventionally a circuit is represented as a network of single-output gates. In this paper, we propose an implementation... [more] |
VLD2019-4 pp.25-30 |
IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] |
2019-01-30 11:20 |
Kanagawa |
Raiosha, Hiyoshi Campus, Keio University (Kanagawa) |
An Incremental Automatic Test Pattern Generation Method for Multiple Stuck-at Faults Peikun Wang, Amir Masoud Gharehbaghi, Masahiro Fujita (UTokyo) VLD2018-74 CPSY2018-84 RECONF2018-48 |
This paper proposes an incremental ATPG method to deal with multiple stuck-at faults. In order to generate the test set ... [more] |
VLD2018-74 CPSY2018-84 RECONF2018-48 pp.13-18 |
VLD, IPSJ-SLDM |
2018-05-16 13:30 |
Fukuoka |
Kitakyushu International Conference Center (Fukuoka) |
Partial logic synthesis by using sum of products or product of sums based quantified boolean formulae Xiaoran Han, Amir Masoud Gharehbaghi, Masahiro Fujita (UTokyo) VLD2018-1 |
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... [more] |
VLD2018-1 pp.1-5 |
ICD |
2018-04-20 13:50 |
Tokyo |
(Tokyo) |
[Invited Talk]
Memory LSI using crystalline oxide semiconductor FET Jun Koyama, Takako Seki, Yuto Yakubo, Satoru Ohshita, Kazuma Furutani, Takahiko Ishizu, Tomoaki Atsumi, Yoshinori Ando, Daisuke Matsubayashi, Kiyoshi Kato, Takashi Okuda (SEL), Masahiro Fujita (The Univ. of Tokyo), Shunpei Yamazaki (SEL) ICD2018-12 |
FETs fabricated with a c-axis aligned crystalline In-Ga-Zn oxide semiconductor (CAAC-IGZO) have an extremely low off-sta... [more] |
ICD2018-12 pp.47-52 |
PRMU, BioX |
2018-03-19 10:00 |
Tokyo |
(Tokyo) |
Disposable Biometric Authentication
-- Micro Biometric Authentication Using Fingernail Textures -- Genki Sugimoto, Masahiro Fujita, Yuto Mano, Tetsushi Ohki, Masakatsu Nishigaki (Shizuoka Univ.) BioX2017-57 PRMU2017-193 |
Recently, biometric authentication has been applied to not only important services such as in emigration/immigration ins... [more] |
BioX2017-57 PRMU2017-193 pp.127-132 |
VLD, IPSJ-SLDM |
2017-05-10 13:30 |
Fukuoka |
Kitakyushu International Conference Center (Fukuoka) |
VLD2017-1 |
In this paper, we present techniques to automatically generate high-level C description after ECO (Engineering Change Or... [more] |
VLD2017-1 pp.1-6 |
ICD |
2017-04-21 13:50 |
Tokyo |
(Tokyo) |
[Invited Lecture]
Embedded Memory and ARM Cortex-M0 Core Using 60-nm CAAC-IGZO FET Integrated with 65-nm Si CMOS Tatsuya Onuki, Atsuo Isobe, Yoshinori Ando, Satoru Okamoto, Kiyoshi Kato (Semiconductor Energy Laboratory), T R Yew, Chen Bin Lin, J Y Wu, Chi Chang Shuai, Shao Hui Wu (United Microelectronics Corporation), James Myers (ARM), Klaus Doppler (Nokia Technologies), Masahiro Fujita (The Univ. of Tokyo), Shunpei Yamazaki (Semiconductor Energy Laboratory) ICD2017-17 |
[more] |
ICD2017-17 pp.89-93 |
PRMU, BioX |
2017-03-20 16:10 |
Aichi |
(Aichi) |
A Proposal of Micro Biometric Authentication using Nail Texture Genki Sugimoto, Masahiro Fujita, Yuto Mano, Hiroaki Muramatsu, Masakatsu Nishigaki (Shizuoka Univ.) BioX2016-48 PRMU2016-211 |
Micro biometric authentication is an authentication mechanism which applies minute patterns of a user’s body parts into ... [more] |
BioX2016-48 PRMU2016-211 pp.93-97 |
IA |
2016-11-03 16:00 |
Overseas |
Taipei (Taiwan) (Overseas) |
[Poster Presentation]
Design and Implementation of a Monitoring Tool for Testing a Communication System Utilizing SDN Shintaro Ishihara, Toyokazu Akiyama, Masahiro Fujita, Kazuki Shinno (Kyoto Sangyo Univ.) IA2016-36 |
In a development procedure of SDN applications, network behavior controlled by the developed SDN controller must be inve... [more] |
IA2016-36 pp.51-53 |
IA |
2016-11-03 16:00 |
Overseas |
Taipei (Taiwan) (Overseas) |
[Poster Presentation]
A Study of Objective Function to Determine Proper Communication Method in SDN aware Pub/Sub Systems Masahiro Fujita, Toyokazu Akiyama (Kyoto Sangyo Univ.), Katsuyoshi Iida (Hokkaido Univ.) IA2016-37 |
[more] |
IA2016-37 pp.55-58 |