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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, CPSY, RECONF, CPM, ICD, IE
(Joint) [detail]
2016-11-29
10:55
Osaka Ritsumeikan University, Osaka Ibaraki Campus Development of power estimation tool for three dimensional FPGA
Masato Ikebe, Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2016-46
Three-dimensional (3D) stacking technology is attractive for providing another way to improve the performance of the lar... [more] RECONF2016-46
pp.35-40
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-19
11:05
Kanagawa Hiyoshi Campus, Keio University FPGA routing structure based on H-Tree topology
Yuki ishii, Masato Ikebe, Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) VLD2015-78 CPSY2015-110 RECONF2015-60
FPGA(Fiele Programmable Gate Array) has many routing resources in order to provide the flexibility. These routing resour... [more] VLD2015-78 CPSY2015-110 RECONF2015-60
pp.7-12
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