| IEICE Technical Committee Submission System Conference Schedule |
Online Proceedings [Sign in] Tech. Rep. Archives |
All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| EMM, BioX, ISEC, SITE, ICSS, HWS, IPSJ-CSEC, IPSJ-SPT [detail] | 2023-07-24 16:20 |
Hokkaido | Hokkaido Jichiro Kaikan (Hokkaido) | A Random Ensemble Method with Encrypted Models for Improving Robustness against Adversarial Examples Ryota Iijima, Miki Tanaka, Sayaka Shiota, Hitoshi Kiya (Tokyo Metro. Univ.)  ISEC2023-27 SITE2023-21 BioX2023-30 HWS2023-27 ICSS2023-24 EMM2023-27 |
[more] | ISEC2023-27 SITE2023-21 BioX2023-30 HWS2023-27 ICSS2023-24 EMM2023-27 pp.86-90 |
| EMM | 2023-01-26 09:55 |
Miyagi | Tohoku Univ. (Miyagi, Online) (Primary: On-site, Secondary: Online) |
On the Transferability of Adversarial Examples between Isotropic Network and CNN models Miki Tanaka (Tokyo Metropolitan Univ.), Isao Echizen (NII), Hitoshi Kiya (Tokyo Metropolitan Univ.) EMM2022-62 |
Deep neural networks are well known to be vulnerable to adversarial examples (AEs). In addition, AEs generated for a sou... [more] | EMM2022-62 pp.7-12 |
| CAS, SIP, VLD, MSS | 2022-06-16 14:40 |
Aomori | Hachinohe Institute of Technology (Aomori, Online) (Primary: On-site, Secondary: Online) |
Adversarial Robustness of Secret Key-Based Defenses against AutoAttack Miki Tanaka, April Pyone MaungMaung (Tokyo Metro Univ.), Isao Echizen (NII), Hitoshi Kiya (Tokyo Metro Univ.) CAS2022-7 VLD2022-7 SIP2022-38 MSS2022-7 |
Deep neural network (DNN) models are well-known to easily misclassify prediction results by using input images with smal... [more] | CAS2022-7 VLD2022-7 SIP2022-38 MSS2022-7 pp.34-39 |
| EMM | 2022-03-07 15:55 |
Online | (Primary: Online, Secondary: On-site) (Online, Nagasaki) (Primary: Online, Secondary: On-site) |
[Poster Presentation]
Video Forgery Detection Using a Robust Hashing Algorithm Shoko Niwa, Miki Tanaka, Hitoshi Kiya (Tokyo Metro. Univ.) EMM2021-102 |
In this paper, we propose a method to detect the editing of video signals using a robust hashing algorithm. The assumed ... [more] | EMM2021-102 pp.58-63 |
| EMM | 2022-03-07 17:00 |
Online | (Primary: Online, Secondary: On-site) (Online, Nagasaki) (Primary: Online, Secondary: On-site) |
Extention of robust image classification system with Adversarial Example Detectors Miki Tanaka, Takayuki Osakabe, Hitoshi Kiya (Tokyo Metro. Univ.) EMM2021-105 |
In image classification with deep learning, there is a risk that an attacker can intentionally manipulate the prediction... [more] | EMM2021-105 pp.76-80 |
| EMM, EA, ASJ-H | 2021-11-15 09:00 |
Online | Online (Online) | [Poster Presentation]
A consideration of training datasets for universal detectors of CNN-generated images Miki Tanaka, Hitoshi Kiya (Tokyo Metro. Univ.) EA2021-32 EMM2021-59 |
Recent rapid advances in convolutional neural networks (CNNs) have made manipulating and generating images easy, so synt... [more] | EA2021-32 EMM2021-59 pp.31-36 |
| EMM, IT | 2021-05-20 14:35 |
Online | Online (Online) | A universal detector of CNN-generated images based on properties of checkerboard artifacts Miki Tanaka, Hitoshi Kiya (Metro Univ.) IT2021-3 EMM2021-3 |
We propose a universal detector of images generated by using any CNNs to detect CNN-generated images. We consider prope... [more] |
IT2021-3 EMM2021-3 pp.13-18 |
| SIS, ITE-BCT | 2020-10-01 13:20 |
Online | Online (Online) | Robustness Evaluation of Detectinon methods for Image manipulation with GANs Miki Tanaka, Hitoshi Kiya (Tokyo Metropolitan Univ.) SIS2020-14 |
Recent rapid advances in image manipulation tools and deep image synthesis techniques, such as Generative Adversarial Ne... [more] | SIS2020-14 pp.23-28 |
| SDM, ICD, ITE-IST [detail] | 2018-08-08 13:15 |
Hokkaido | Hokkaido Univ., Graduate School of IST M Bldg., M151 (Hokkaido) | [Invited Lecture]
A Highly Symmetrical 10T 2-Read/Write Dual-port SRAM Bitcell Design In 28nm High-k/Metal-gate Planar Bulk CMOS Technology Yuichiro Ishii, Miki Tanaka, Makoto Yabuuchi, Yohei Sawada, Shinji Tanaka, Koji Nii (Renesas), Tien Yu Lu, Chun Hsien Huang, Shou Sian Chen, Yu Tse Kuo, Ching Cheng Lung, Osbert Cheng (UMC) SDM2018-40 ICD2018-27 |
We propose a highly symmetrical 10T 2-read/write (2RW) dual-port (DP) SRAM bitcell in 28-nm high-k/metal-gate planar bul... [more] | SDM2018-40 ICD2018-27 pp.83-88 |
| ICD | 2017-04-21 10:25 |
Tokyo | (Tokyo) | [Invited Lecture]
A 6.05-Mb/mm2 16-nm FinFET Double Pumping 1W1R 2-port SRAM with 313ps Read Access Time Yohei Sawada, Makoto Yabuuchi, Masao Morimoto (REL), Toshiaki Sano (RSD), Yuichiro Ishii, Shinji Tanaka (REL), Miki Tanaka (RSD), Koji Nii (REL) ICD2017-12 |
[more] | ICD2017-12 pp.63-65 |
| ICD | 2016-04-14 10:10 |
Tokyo | Kikai-Shinko-Kaikan Bldg. (Tokyo) | [Invited Lecture]
A Cost Effective Test Screening Method on 40-nm 4-Mb Embedded SRAM for Low-power MCU Yuta Yoshida (RSD), Yoshisato Yokoyama, Yuichiro Ishii (Renesas Electronics), Toshihiro Inada, Koji Tanaka, Miki Tanaka, Yoshiki Tsujihashi (RSD), Koji Nii (Renesas Electronics) ICD2016-1 |
An embedded single-port SRAM with cost effective test screening circuitry is demonstrated for low-power micr... [more] | ICD2016-1 pp.1-6 |
| SDM | 2016-01-28 14:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. (Tokyo) | [Invited Talk]
2RW Dual-port SRAM Design Challenges in Advanced Technology Nodes Koji Nii, Makoto Yabuuchi (Renesas), Yoshisato Yokoyama (Renesas System Design), Yuichiro Ishii, Takeshi Okagaki, Masao Morimoto, Yasumasa Tsukamoto (Renesas), Koji Tanaka, Miki Tanaka (Renesas System Design), Shinji Tanaka (Renesas) SDM2015-125 |
[more] | SDM2015-125 pp.21-25 |
| ICD | 2015-04-16 13:00 |
Nagano | (Nagano) | [Invited Lecture]
20nm High-Density Single-Port and Dual-Port SRAMs with Wordline-Voltage-Adjustment System for Read/Write Assists Makoto Yabuuchi, Yasumasa Tsukamoto, Masao Morimoto, Miki Tanaka, Koji Nii (Renesas) ICD2015-1 |
[more] | ICD2015-1 pp.1-4 |
| SDM | 2015-01-27 15:55 |
Tokyo | Kikai-Shinko-Kaikan Bldg. (Tokyo) | [Invited Talk]
16 nm FinFET High-k/Metal-gate 256-kbit 6T SRAM Macros with Wordline Overdriven Assist Makoto Yabuuchi, Masao Morimoto, Yasumasa Tsukamoto, Shinji Tanaka, Koji Tanaka, Miki Tanaka, Koji Nii (Renesas) SDM2014-144 |
We demonstrate 16 nm FinFET High-k/Metal-gate SRAM macros with a wordline (WL) overdriven read/write-assist circuit. Tes... [more] | SDM2014-144 pp.37-40 |
[Return to Top Page]