IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

All Technical Committee Conferences  (Searched in: All Years)

Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 14 of 14  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
EMM, BioX, ISEC, SITE, ICSS, HWS, IPSJ-CSEC, IPSJ-SPT [detail] 2023-07-24
Hokkaido Hokkaido Jichiro Kaikan A Random Ensemble Method with Encrypted Models for Improving Robustness against Adversarial Examples
Ryota Iijima, Miki Tanaka, Sayaka Shiota, Hitoshi Kiya (Tokyo Metro. Univ.) ISEC2023-27 SITE2023-21 BioX2023-30 HWS2023-27 ICSS2023-24 EMM2023-27
 [more] ISEC2023-27 SITE2023-21 BioX2023-30 HWS2023-27 ICSS2023-24 EMM2023-27
EMM 2023-01-26
Miyagi Tohoku Univ.
(Primary: On-site, Secondary: Online)
On the Transferability of Adversarial Examples between Isotropic Network and CNN models
Miki Tanaka (Tokyo Metropolitan Univ.), Isao Echizen (NII), Hitoshi Kiya (Tokyo Metropolitan Univ.) EMM2022-62
Deep neural networks are well known to be vulnerable to adversarial examples (AEs). In addition, AEs generated for a sou... [more] EMM2022-62
CAS, SIP, VLD, MSS 2022-06-16
Aomori Hachinohe Institute of Technology
(Primary: On-site, Secondary: Online)
Adversarial Robustness of Secret Key-Based Defenses against AutoAttack
Miki Tanaka, April Pyone MaungMaung (Tokyo Metro Univ.), Isao Echizen (NII), Hitoshi Kiya (Tokyo Metro Univ.) CAS2022-7 VLD2022-7 SIP2022-38 MSS2022-7
Deep neural network (DNN) models are well-known to easily misclassify prediction results by using input images with smal... [more] CAS2022-7 VLD2022-7 SIP2022-38 MSS2022-7
EMM 2022-03-07
Online (Primary: Online, Secondary: On-site)
(Primary: Online, Secondary: On-site)
[Poster Presentation] Video Forgery Detection Using a Robust Hashing Algorithm
Shoko Niwa, Miki Tanaka, Hitoshi Kiya (Tokyo Metro. Univ.) EMM2021-102
In this paper, we propose a method to detect the editing of video signals using a robust hashing algorithm. The assumed ... [more] EMM2021-102
EMM 2022-03-07
Online (Primary: Online, Secondary: On-site)
(Primary: Online, Secondary: On-site)
Extention of robust image classification system with Adversarial Example Detectors
Miki Tanaka, Takayuki Osakabe, Hitoshi Kiya (Tokyo Metro. Univ.) EMM2021-105
In image classification with deep learning, there is a risk that an attacker can intentionally manipulate the prediction... [more] EMM2021-105
EMM, EA, ASJ-H 2021-11-15
Online Online [Poster Presentation] A consideration of training datasets for universal detectors of CNN-generated images
Miki Tanaka, Hitoshi Kiya (Tokyo Metro. Univ.) EA2021-32 EMM2021-59
Recent rapid advances in convolutional neural networks (CNNs) have made manipulating and generating images easy, so synt... [more] EA2021-32 EMM2021-59
EMM, IT 2021-05-20
Online Online A universal detector of CNN-generated images based on properties of checkerboard artifacts
Miki Tanaka, Hitoshi Kiya (Metro Univ.) IT2021-3 EMM2021-3
We propose a universal detector of images generated by using any CNNs to detect CNN-generated images.
We consider prope... [more]
IT2021-3 EMM2021-3
SIS, ITE-BCT 2020-10-01
Online Online Robustness Evaluation of Detectinon methods for Image manipulation with GANs
Miki Tanaka, Hitoshi Kiya (Tokyo Metropolitan Univ.) SIS2020-14
Recent rapid advances in image manipulation tools and deep image synthesis techniques, such as Generative Adversarial Ne... [more] SIS2020-14
SDM, ICD, ITE-IST [detail] 2018-08-08
Hokkaido Hokkaido Univ., Graduate School of IST M Bldg., M151 [Invited Lecture] A Highly Symmetrical 10T 2-Read/Write Dual-port SRAM Bitcell Design In 28nm High-k/Metal-gate Planar Bulk CMOS Technology
Yuichiro Ishii, Miki Tanaka, Makoto Yabuuchi, Yohei Sawada, Shinji Tanaka, Koji Nii (Renesas), Tien Yu Lu, Chun Hsien Huang, Shou Sian Chen, Yu Tse Kuo, Ching Cheng Lung, Osbert Cheng (UMC) SDM2018-40 ICD2018-27
We propose a highly symmetrical 10T 2-read/write (2RW) dual-port (DP) SRAM bitcell in 28-nm high-k/metal-gate planar bul... [more] SDM2018-40 ICD2018-27
ICD 2017-04-21
Tokyo   [Invited Lecture] A 6.05-Mb/mm2 16-nm FinFET Double Pumping 1W1R 2-port SRAM with 313ps Read Access Time
Yohei Sawada, Makoto Yabuuchi, Masao Morimoto (REL), Toshiaki Sano (RSD), Yuichiro Ishii, Shinji Tanaka (REL), Miki Tanaka (RSD), Koji Nii (REL) ICD2017-12
 [more] ICD2017-12
ICD 2016-04-14
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Lecture] A Cost Effective Test Screening Method on 40-nm 4-Mb Embedded SRAM for Low-power MCU
Yuta Yoshida (RSD), Yoshisato Yokoyama, Yuichiro Ishii (Renesas Electronics), Toshihiro Inada, Koji Tanaka, Miki Tanaka, Yoshiki Tsujihashi (RSD), Koji Nii (Renesas Electronics) ICD2016-1
An embedded single-port SRAM with cost effective test screening circuitry is demonstrated for low-power micr... [more] ICD2016-1
SDM 2016-01-28
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] 2RW Dual-port SRAM Design Challenges in Advanced Technology Nodes
Koji Nii, Makoto Yabuuchi (Renesas), Yoshisato Yokoyama (Renesas System Design), Yuichiro Ishii, Takeshi Okagaki, Masao Morimoto, Yasumasa Tsukamoto (Renesas), Koji Tanaka, Miki Tanaka (Renesas System Design), Shinji Tanaka (Renesas) SDM2015-125
 [more] SDM2015-125
ICD 2015-04-16
Nagano   [Invited Lecture] 20nm High-Density Single-Port and Dual-Port SRAMs with Wordline-Voltage-Adjustment System for Read/Write Assists
Makoto Yabuuchi, Yasumasa Tsukamoto, Masao Morimoto, Miki Tanaka, Koji Nii (Renesas) ICD2015-1
 [more] ICD2015-1
SDM 2015-01-27
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] 16 nm FinFET High-k/Metal-gate 256-kbit 6T SRAM Macros with Wordline Overdriven Assist
Makoto Yabuuchi, Masao Morimoto, Yasumasa Tsukamoto, Shinji Tanaka, Koji Tanaka, Miki Tanaka, Koji Nii (Renesas) SDM2014-144
We demonstrate 16 nm FinFET High-k/Metal-gate SRAM macros with a wordline (WL) overdriven read/write-assist circuit. Tes... [more] SDM2014-144
 Results 1 - 14 of 14  /   
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)

[Return to Top Page]

[Return to IEICE Web Page]

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan