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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
ED 2009-04-24
Miyagi Tohoku Univ. Growth of polycrystalline Si on plastic substrate using pulsed-plasma CVD under near atmospheric Pressure
Shogo Murashige, Mitsutaka Matsumoto, Yohei Inayoshi, Maki Suemitsu (Tohoku Univ.), Setsuo Nakajima, Tsuyoshi Uehara (Sekisui Chemicals Co. Ltd), Yasutake Toyoshima (AIST-ETRI) ED2009-15
Polycrystalline Si films have been deposited on polyethylene terephthalate(PET) substrates using pulsed-plasma CVD under... [more] ED2009-15
SDM 2008-06-10
Tokyo An401・402, Inst. Indus. Sci., The Univ. of Tokyo XPS real-time monitoring on the development of Si suboxides during formation of thermal oxide on Si(110) surface
Yoshihisa Yamamoto, Hideaki Togashi, Atsushi Konno, Mitsutaka Matsumoto, Atsushi Kato, Eiji Saito, Maki Suemitsu (Tohoku Univ.), Yuden Teraoka, Akitaka Yoshigoe (JAEA) SDM2008-53
The growth process of thermal oxides on Si(110) surface and its interfacial bonding structures have been investigated by... [more] SDM2008-53
VLD, ICD 2008-03-07
Okinawa TiRuRu Implementation and Evaluation of Network Security using An Embedded Programmable Logic Matrix (ePLX)
Mitsutaka Matsumoto, Shun Kimura (Ritsumeikan Univ.), Hirofumi Nakano, Takenobu Iwao, Yoshihiro Okuno, Kazutami Arimoto (Renesas Technology Corp.), Tomonori Izumi, Takeshi Fujino (Ritsumeikan Univ.) VLD2007-165 ICD2007-188
Low Cost Network Appliance with low power microprocessor must be connected with networks in order to realize ubiquitous ... [more] VLD2007-165 ICD2007-188
(Joint) [detail]
Fukuoka Kitakyushu International Conference Center A Development of the Auto mapping tool for embedded Programmable Logic matriX (ePLX) and the study of ePLX local architecture
Kouta Ishibashi, Yoshiyuki Tanaka, Mitsutaka Matsumoto (Ritsumeikan Univ.), Hirofumi Nakano, Takenobu Iwao, Yoshihiro Okuno, Kazutami Arimoto (Renesas Technology), Masaya Yoshikawa (Meijo Univ.), Tomonori Izumi, Takeshi Fujino (Ritsumeikan Univ.) RECONF2007-32
We propose a ePLX(embedded Programmable Logic matriX)which will be embedded in SoC.The ePLX consists of small area and a... [more] RECONF2007-32
Tokyo Keio Univ. Hiyoshi Campus Analysis of design architecture of ePLX ( embedded Programmable Logic matriX) and Evaluation of circuit mapping
Tomoo Hishida, Kouta Ishibashi, Shun Kimura, Naoki Okuno, Mitsutaka Matsumoto (Ritsumeikan Univ.), Hirofumi Nakano, Takenobu Iwao, Yoshihiro Okuno, Kazutami Arimoto (Renesas Technology), Tomonori Izumi, Takeshi Fujino (Ritsumeikan Univ.)
Recently, non-recurring engineering costs (NREs), including cost of mask-sets, and engineering design efforts are critic... [more] VLD2006-100 CPSY2006-71 RECONF2006-71
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