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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2023-11-15 14:40 |
Kumamoto | Civic Auditorium Sears Home Yume Hall (Primary: On-site, Secondary: Online) |
A 183.4 nJ/inference 152.8 µW Single-Chip Wired-Logic DNN Processor for Always-On 35 Voice Commands Recognition Application Rei Sumikawa, Atsutake Kosuge, Mototsugu Hamada, Tadahiro Kuroda (UTokyo)  VLD2023-39 ICD2023-47 DC2023-46 RECONF2023-42 |
A 183.4-nJ/inference single-chip wired-logic DNN processor that is capable of recognizing all 35 commands defined in the... [more] | VLD2023-39 ICD2023-47 DC2023-46 RECONF2023-42 pp.54-59 |
| ICD | 2005-12-16 10:50 |
Kochi | A Conditional Clocking Flip-Flop for Low Power H.264/MPEG-4 Audio/Visual Codec LSI Mototsugu Hamada, Hiroyuki Hara, Tetsuya Fujita, Chen Kong Teh, Takayoshi Shimazawa, Naoyuki Kawabe, Takeshi Kitahara, Yu Kikuchi, Tsuyoshi Nishikawa, Masafumi Takahashi, Yukihito Oowaki (Toshiba Corp.) |
A novel conditional clocking flip-flop is proposed. The flip-flop circuit does not consume any power when the data inpu... [more] | ICD2005-196 pp.25-29 |
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| ICD | 2005-12-16 14:25 |
Kochi | A 1.2-V CMOS Complex Bandpass Filter with a Tunable Center Frequency Hideaki Majima, Hiroki Ishikuro, Kenichi Agawa, Mototsugu Hamada (Toshiba Corp.) |
[more] | ICD2005-202 pp.61-66 |
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| SIP, ICD, IE, IPSJ-SLDM | 2005-10-21 09:00 |
Miyagi | Ichinobo, Sakunami-Spa | A Phase Noise Minimization of CMOS LC-VCOs Over Wide Tuning Range and Large PVT Variations Daisuke Miyashita, Hiroki Ishikuro, Shouhei Kousai, Hiroyuki Kobayashi, Hideaki Majima, Kenichi Agawa, Mototsugu Hamada (Toshiba Corp.) |
An automatic amplitude control circuit to minimize the phase noise of a LC-VCO is proposed and implemented by a 0.18-μm ... [more] | SIP2005-115 ICD2005-134 IE2005-79 pp.1-5 |
| ICD, SDM | 2005-08-19 08:55 |
Hokkaido | HAKODATE KOKUSAI HOTEL | A Low-IF CMOS Single-Chip Bluetooth EDR Transmitter with Digital I/Q Mismatch Trimming Circuit Hiroki Ishikuro, Daisuke Miyashita, Taro Shimada, Shouhei Kousai, Hiroyuki Kobayashi, Hideaki Majima, Kenichi Agawa, Mototsugu Hamada, Fumitoshi Hatori (Toshiba) |
A single-chip low-IF transmitter for the Bluetooth Enhanced Data Rate (max. 3Mbps) was fabricated in 0.18-um CMOS proces... [more] | SDM2005-144 ICD2005-83 pp.7-12 |
| ICD, SDM | 2005-08-19 15:15 |
Hokkaido | HAKODATE KOKUSAI HOTEL | High-k; Last Card for the Leakage Currents Tadayoshi Enomoto (Chuo Univ.), Mariko Takayanagi (Toshiba), Shigeo Satoh (Fujitu), Koji Nii (Renesas), Akira Nishiyama (Toshiba), ハセ タカシ (NEC), Mototsugu Hamada (Toshiba), Jiro Yugami (Renesas) |
(Advance abstract in Japanese is available) [more] | SDM2005-155 ICD2005-94 pp.73-78 |
| ICD | 2005-05-26 11:00 |
Hyogo | Kobe Univ. | An H.264/MPEG-4 Audio/Visual Codec LSI with Module-Wise Dynamic Voltage/Frequency Scaling Yoshiyuki Kitasho, Toshihide Fujiyoshi, Shinichiro Shiratake, Tsuyoshi Nishikawa, Mototsugu Hamada, Hiroyuki Hara, Tetsuya Fujita, Fumitoshi Hatori, Takayoshi Shimazawa, Masami Murakata, Fumihiro Minami, Naoyuki Kawabe, Takeshi Kitahara, Masafumi Takahashi, Yukihito Oowaki (TOSHIBA) |
A single-chip MPEG-4 audiovisual LSI with ability of CIF 15fps encoding is fabricated in a 0.13um CMOS, 5-layer metal te... [more] | ICD2005-22 pp.13-18 |
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