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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 56  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
IPSJ-SLDM, RECONF, VLD [detail] 2023-01-24
11:45
Kanagawa Raiosha, Hiyoshi Campus, Keio University
(Primary: On-site, Secondary: Online)
Efficient FPGA Implementation of Binarized Neural Networks Based on Generalized Parallel Counter Tree
Takahiro Tanigawa, Mugi Noda, Nagisa Ishiura (Kwansei Gakuin Univ.)
 [more]
RECONF, VLD, CPSY, IPSJ-ARC, IPSJ-SLDM [detail] 2022-01-24
10:20
Online Online Full Hardware Implementation of RTOS-Based Systems Using General-Purpose High-Level Synthesizer
Takuya Ando, Yugo Ishii, Nagisa Ishiura (Kwansei Gakuin Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroyuki Kanbara (ASTEM RI/KYOTO) VLD2021-51 CPSY2021-20 RECONF2021-59
This article proposes a method for implementing a whole RTOS-based system as hardware using general-purpose high-level s... [more] VLD2021-51 CPSY2021-20 RECONF2021-59
pp.13-18
RECONF, VLD, CPSY, IPSJ-ARC, IPSJ-SLDM [detail] 2022-01-24
10:45
Online Online Design of Inter-Task Communication Modules for Full Hardware Implementation of RTOS-Based Systems
Yukino Shinohara, Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2021-52 CPSY2021-21 RECONF2021-60
This paper presents hardware implementation of inter-task communication functions of RTOS, in the scheme where all the t... [more] VLD2021-52 CPSY2021-21 RECONF2021-60
pp.19-24
RECONF, VLD, CPSY, IPSJ-ARC, IPSJ-SLDM [detail] 2022-01-25
16:40
Online Online Testing of Optimization Performance of Android DEX Compilers Based on Native Code Comparison
Naoki Yoshida, Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2021-74 CPSY2021-43 RECONF2021-82
This paper presents a method for testing optimizing performance of Android DEX compilers based on comparison of resultin... [more] VLD2021-74 CPSY2021-43 RECONF2021-82
pp.143-147
HWS, VLD [detail] 2021-03-03
14:55
Online Online Aggregating Service Functions in Full Hardware Implementation of RTOS-Based Systems
Iori Muguruma, Nagisa Ishiura, Takuya Ando (Kwansei Gakuin Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroyuki Kanbara (ASTEM RI/KYOTO) VLD2020-75 HWS2020-50
This article presents a revised architecture for full-hardware
implementation of RTOS-based systems. In the previous m... [more]
VLD2020-75 HWS2020-50
pp.38-43
CPSY, RECONF, VLD, IPSJ-ARC, IPSJ-SLDM [detail] 2021-01-26
14:40
Online Online Mutation-Based Fuzzing Using Data Structure Captured via Data Generator
Noriyuki Namba, Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2020-64 CPSY2020-47 RECONF2020-83
 [more] VLD2020-64 CPSY2020-47 RECONF2020-83
pp.143-147
CPSY, RECONF, VLD, IPSJ-ARC, IPSJ-SLDM [detail] 2021-01-26
15:05
Online Online Detection of Vulnerability Inducing Code Optimization Based on Binary Code
Yuka Azuma, Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2020-65 CPSY2020-48 RECONF2020-84
In this paper, we propose a method to detect vulnerability inducing code elimination by compiler optimization. It is re... [more] VLD2020-65 CPSY2020-48 RECONF2020-84
pp.148-153
CPSY, RECONF, VLD, IPSJ-ARC, IPSJ-SLDM [detail] 2021-01-26
15:30
Online Online Performance Testing of VRP Optimization of C Compilers by Random Program Generation
Daiki Murakami, Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2020-66 CPSY2020-49 RECONF2020-85
This paper proposes an automated method to test if C compilers properly perform VRP optimization. The VRP optimization i... [more] VLD2020-66 CPSY2020-49 RECONF2020-85
pp.154-159
HWS, VLD [detail] 2020-03-05
10:30
Okinawa Okinawa Ken Seinen Kaikan
(Cancelled but technical report was issued)
Motor Current Signature Analysis Based On-Line Fault Detection of DC Motor
Naoki Osako (Kwansei Gakuin Univ.), Hiroyuki Kanbara (ASTEM), Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2019-111 HWS2019-84
This article presents a method for online detection of DC motors' fault based on current signature analysis.
While cu... [more]
VLD2019-111 HWS2019-84
pp.101-106
HWS, VLD [detail] 2020-03-05
13:00
Okinawa Okinawa Ken Seinen Kaikan
(Cancelled but technical report was issued)
Hardware Control from Erlang Programs on Programmable SoC
Hidekazu Wakabayashi (Kwansei Gakuin Univ.), Nagisa Ishiura (Kwnsei Gakuin Univ.) VLD2019-114 HWS2019-87
This article presents a method for controlling custom hardware from Erlang programs.
Higher and higher functionality, ... [more]
VLD2019-114 HWS2019-87
pp.119-124
IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] 2020-01-22
15:25
Kanagawa Raiosha, Hiyoshi Campus, Keio University Increasing Test Variation for C Compilers by Equivalent Mutant Generation
Hiroki Maeda, Nagisa ishiura (Kwansei Gakuin Univ.) VLD2019-61 CPSY2019-59 RECONF2019-51
This article proposes a method of increasing variation of test programs in automatic testing of C compilers by means of ... [more] VLD2019-61 CPSY2019-59 RECONF2019-51
pp.43-48
IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] 2020-01-22
15:50
Kanagawa Raiosha, Hiyoshi Campus, Keio University Mutation Fuzzing Based on Type Estimation of Data Items Utilizing Data Writer
Yoko Higuchi, Nagisa Ishiura, Namba Noriyuki (Kwansei Gakuin Univ.) VLD2019-62 CPSY2019-60 RECONF2019-52
This article proposes a novel way of acquiring information, which is used for enhancing efficiency of fuzzing for softwa... [more] VLD2019-62 CPSY2019-60 RECONF2019-52
pp.49-53
IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] 2020-01-23
11:25
Kanagawa Raiosha, Hiyoshi Campus, Keio University Full Hardware Synthesis of FreeRTOS-Based Systems
Wakako Nakano, Nagisa Ishiura (Kwansei Gakuin Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroyuki Kanbara (ASTEM) VLD2019-70 CPSY2019-68 RECONF2019-60
 [more] VLD2019-70 CPSY2019-68 RECONF2019-60
pp.105-110
IPSJ-SLDM, RECONF, VLD, CPSY, IPSJ-ARC [detail] 2020-01-23
11:50
Kanagawa Raiosha, Hiyoshi Campus, Keio University Binary Synthesis from RISC-V Executables
Shoki Hamana, Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2019-71 CPSY2019-69 RECONF2019-61
This article presents a method of synthesizing hardware from RISC-V binary codes. RISC-V is an open source instruction s... [more] VLD2019-71 CPSY2019-69 RECONF2019-61
pp.111-115
HWS, VLD 2019-03-01
10:00
Okinawa Okinawa Ken Seinen Kaikan Synthesis of Full Hardware Implementation of RTOS-Based Systems
Yuuki Oosako, Nagisa Ishiura (Kwansei Gakuin Univ.), Hiroyuki Tomiyama (Ritsumeikan Univ.), Hiroyuki Kanbara (ASTEM) VLD2018-122 HWS2018-85
This paper presents a method of automatically synthesizing a hardware
design from a set of source codes for a real-time... [more]
VLD2018-122 HWS2018-85
pp.175-180
HWS, VLD 2019-03-01
10:50
Okinawa Okinawa Ken Seinen Kaikan Reinforcing Generation of Instruction Sequences in Random Testing of Android Virtual Machine
Ryotaro Shimizu, Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2018-124 HWS2018-87
This article presents a method of reinforcing generation of instruction sequences in random testing of the Android virtu... [more] VLD2018-124 HWS2018-87
pp.187-192
HWS, VLD 2019-03-01
11:15
Okinawa Okinawa Ken Seinen Kaikan Synthesis of Distributed Control Circuits for Dynamic Scheduling across Multiple Dataflow Graphs
Sayuri Ota, Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2018-125 HWS2018-88
This article presents a method for synthesizing circuits with distributed control from CDFGs (control data flow graphs).... [more] VLD2018-125 HWS2018-88
pp.193-198
VLD, HWS
(Joint)
2018-02-28
13:30
Okinawa Okinawa Seinen Kaikan Random Testing of Android Virtual Machine by Valid Dex File Generation
Hirofumi Ikeo, Ryotaro Shimizu, Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2017-95
 [more] VLD2017-95
pp.37-42
IPSJ-ARC, VLD, CPSY, RECONF, IPSJ-SLDM [detail] 2018-01-18
17:00
Kanagawa Raiosha, Hiyoshi Campus, Keio University Distributed Memory Architecture for High-Level Synthesis from Erlang
Kagumi Azuma, Shoki Hamana, Hidekazu Wakabayashi, Nagisa Ishiura (Kwansei Gakuin Univ.), Nobuaki Yoshida, Hiroyuki Kanbara (ASTEM) VLD2017-75 CPSY2017-119 RECONF2017-63
This paper presents a distributed memory architecture for dedicated
hardware automatically synthesized from Erlang prog... [more]
VLD2017-75 CPSY2017-119 RECONF2017-63
pp.77-82
IPSJ-ARC, VLD, CPSY, RECONF, IPSJ-SLDM [detail] 2018-01-19
16:15
Kanagawa Raiosha, Hiyoshi Campus, Keio University Reinforcing Generation of Control Flow Statements in Random Test System of C Compilers Based on Equivalence Transformation
Mitsuyoshi Iwatsuji, Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2017-87 CPSY2017-131 RECONF2017-75
This article proposes a method of reinforcing generation of control statements in random testing of compilers based on e... [more] VLD2017-87 CPSY2017-131 RECONF2017-75
pp.163-168
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