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Committee Date Time Place Paper Title / Authors Abstract Paper #
ED, SDM 2010-06-30
15:30		 Tokyo Tokyo Inst. of Tech. Ookayama Campus Fabrication of InP/InGaAs DHBTs with buried SiO2 wires
Naoaki Takebe, Takashi Kobayashi, Hiroyuki Suzuki, Yasuyuki Miyamoto, Kazuhito Furuya (Tokyo Inst. of Tech.) ED2010-69 SDM2010-70		 In this paper, we report the fabrication and device characteristics of InP/InGaAs double heterojunction bipolar transist... [more] ED2010-69 SDM2010-70
pp.75-79
ED 2009-06-12
10:20		 Tokyo   In-situ etching by CBr4 in InP heterojunction bipolar transistors with buried SiO2 wire
Naoaki Takebe, Hiroaki Yamashita, Shinnosuke Takahashi, Hisashi Saito, Takashi Kobayashi, Yasuyuki Miyamoto, Kazuhito Furuya (Tokyo Inst. of Tech.) ED2009-46		 In order to obtain high-speed InP heterojunction bipolar transistors (HBTs), it is necessary to reduce the base-collecto... [more] ED2009-46
pp.51-55
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